# SK6054D4-10

**Suntek** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · DFN1x1-4

SK6054D4-10 from Suntek, in a DFN1x1-4. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUT | power_out | Regulated output pin; the output capacitor (0.47µF to 10µF, usually 1µF, ESR 5 to 100mΩ, X7R or X5R ceramic recommended) should be placed as close as possible to the OUT and GND pins. |
| 2 | GND | power_in | Ground pin, which must also be connected to the thermal pad; a wide copper trace is required for both VIN and GND. |
| 3 | CE | input | Chip enable, active high: the regulator is on when CE is at H (VENH min 0.9 V) and in standby when at L (VENL max 0.4 V), and CE must not be left floating because it has no internal pull-up or pull-down, so connect it to IN if unused. |
| 4 | IN | power_in | Input pin with an operating range of 1.2 to 5.0 V (absolute maximum -0.3 to 6.0 V), where a 1µF ceramic input capacitor is recommended as close to the device as possible. |
| 5 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Suntek |
| Package | DFN1x1-4 |
| Category | Power Management (PMIC) |
| Pins | 5 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output Voltage Accuracy, full load, 25°C | VOUT | -2 |  | 2 | % | IOUT = 1mA~500mA, TA = 25°C | 4 |
| Output Voltage Accuracy, -40 to 85°C | VOUT | -2.5 |  | 2.5 | % | IOUT = 1mA, TA = -40°C~85°C | 4 |
| Input Operating Voltage Range | VIN | 1.2 |  | 5 | V |  | 4 |
| DC Supply Quiescent Current (active) | IQ_ON | 30 | 55 | 70 | µA | Active mode: VCE = VIN | 4 |
| DC Supply Shutdown Current | IQ_OFF |  | 0.1 | 2 | µA | VCE = 0V | 4 |
| Output Voltage Line Regulation | RegLINE |  | 0.1 | 0.25 | %/V | VOUT+1V≤VIN≤5V, IOUT = 10mA (ΔVOUT/ΔVIN/VOUT) | 4 |
| Output Voltage Load Regulation | RegLOAD |  | 25 | 45 | mV | IOUT from 1mA to 500mA (ΔVOUT) | 4 |
| Line Transient (output change), VIN up | VTRLN |  | 15 | 30 | mV | IOUT = 1mA, VIN = VOUT+1V to 5V in 10us, TA = 25°C | 4 |
| Line Transient (output change), VIN down | VTRLN |  | 15 | 30 | mV | IOUT = 1mA, VIN = 5V to VOUT+1V in 10us, TA = 25°C | 4 |
| Load Transient (output change), load step up | VTRLD |  | 85 | 120 | mV | VIN = VOUT+1V, IOUT from 1mA to 500mA in 10us, TA = 25°C | 4 |
| Load Transient (output change), load step down | VTRLD |  | 50 | 120 | mV | VIN = VOUT+1V, IOUT from 500mA to 1mA in 10us, TA = 25°C | 4 |
| Output Current | IOUT |  |  | 500 | mA |  | 4 |
| Over Current Limit | ILMT | 600 | 700 | 900 | mA | VIN = VOUT+1V, TA = 25°C | 4 |
| Short Current Limit | ISHORT | 70 | 110 | 180 | mA | VOUT = 0V, TA = 25°C | 5 |
| Power Supply Rejection Ratio | PSRR | 50 | 80 |  | dB | f = 1kHz, COUT = 1µF, IOUT = 20mA, VIN = VOUT+1V, TA = 25°C | 5 |
| Output Noise | eN |  | 40 | 70 | µVRMS | 10Hz to 100kHz, IOUT = 30mA, COUT = 1µF, TA = 25°C | 5 |
| EN Low Threshold | VENL |  |  | 0.4 | V | VIN = 1.2 to 5V | 5 |
| EN High Threshold | VENH | 0.9 |  |  | V | VIN = 1.2 to 5V | 5 |
| CE Pull-down Current | ICE | 0.2 | 0.7 | 1 | µA | VIN = VCE = VOUT+1V, TA = 25°C | 5 |
| Output resistance of auto discharge at off state | RLOW | 20 | 40 | 80 | Ω | VEN = 0V, VIN = 2V, IOUT = 10mA | 5 |
| Thermal Shutdown Temperature | TTSD |  | 160 |  | °C | Junction temperature | 5 |
| Thermal Shutdown Temperature, released | TTSR |  | 140 |  | °C | Junction temperature | 5 |
| Input Voltage | VIN | -0.3 |  | 6 | V |  | 3 |
| Input Voltage (CE Pin) | VCE | -0.3 |  | 6 | V |  | 3 |
| Output Voltage | VOUT | -0.3 |  |  | V | Upper limit printed as VIN+0.3 V | 3 |
| Maximum Load Current | IOUT |  |  | 500 | mA |  | 3 |
| Maximum Power Consumption | PD |  |  | 600 | mW |  | 3 |
| Operating Junction Temperature | TJ | -40 |  | 150 | °C |  | 3 |
| Storage Temperature | TSTG | -65 |  | 150 | °C |  | 3 |
| Lead Temperature (Soldering) | TLEAD |  |  | 300 | °C | Soldering, 10 sec | 3 |
| Input Voltage | VIN | 1.2 |  | 5 | V |  | 3 |
| Output Current | IOUT | 0 |  | 500 | mA |  | 3 |
| Operating Ambient Temperature | TA | -40 |  | 85 | °C |  | 3 |
| Effective Input Ceramic Capacitor Value | CIN | 0.47 |  | 10 | µF |  | 3 |
| Effective Output Ceramic Capacitor Value | COUT | 0.47 |  | 10 | µF |  | 3 |
| Input and Output Capacitor ESR | ESR | 5 |  | 100 | mΩ |  | 3 |
| ESD HBM | HBM | -4000 |  | 4000 | V | ESDA/JEDEC JS-001-2017 | 3 |
| ESD CDM | CDM | -1500 |  | 1500 | V | ESDA/JEDEC JS-002-2014 | 3 |

## CAD (KiCad official)

- Symbol: `SK6054D4-10`
- Footprint: `Package_DFN_QFN:UDFN-4-1EP_1x1mm_P0.65mm_EP0.48x0.48mm`
- 3D model: DFN1x1-4 (KiCad packages3D, STEP)
- 3D model files: `sk6054d4-10-etched.step` / `sk6054d4-10-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sk6054d4-10.step` / `sk6054d4-10.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Suntek datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603345303030546432) (10 pp, sha256 `d354f1ec69d788c6`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/sk6054d4-10-datasheet.pdf)