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SK6054D4-08

Public Made by Adom

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Suntek Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, DFN-4(1x1). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SK6054D4-08

Suntek · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · DFN-4(1x1)

SK6054D4-08 from Suntek, in a DFN-4(1x1). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VOUT power_out Regulated output pin; the datasheet requires an output ceramic capacitor of 0.47 µF to 10 µF (usually 1 µF) with ESR of 5 mΩ to 100 mΩ, placed as close as possible to OUT and GND.
2 GND power_in Ground pin, which must be connected to the thermal pad and wired with a wide copper trace.
3 CE input Chip enable pin where logic H turns the regulator on and L puts it in standby with output auto-discharge; the CE pin has no internal pull-up or pull-down, so it must not be left floating, and it should be tied to IN if unused, with an enable low threshold of 0.4 V and high threshold of 0.9 V.
4 IN power_in Input supply pin for input voltages from 1.2 V to 5.0 V, with a 1 µF ceramic input capacitor recommended between VIN and GND as close to the device as possible.
5 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Suntek
Package DFN-4(1x1)
Category Power Management (PMIC)
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating Input Voltage Range VIN 1.2 5 V 4
DC Supply Quiescent Current (active mode) IQ_ON 30 55 70 µA Active mode: VCE = VIN 4
DC Supply Shutdown Current IQ OFF 0.1 2 µA VCE = 0V 4
Output Voltage accuracy VOUT -2 2 % IOUT = 1mA~500mA, TA = 25°C 4
Output Voltage accuracy over temperature VOUT -2.5 2.5 % IOUT = 1mA, TA = -40°C~85°C 4
Output Voltage Line Regulation RegLINE 0.1 0.25 %/V VOUT+1V≤VIN≤5V, IOUT = 10mA (ΔVOUT/ΔVIN/VOUT) 4
Output Voltage Load Regulation RegLOAD 25 45 mV IOUT from 1mA to 500mA (ΔVOUT) 4
Line Transient (absolute output change) VTRLN 15 30 mV IOUT = 1mA, VIN = VOUT+1V to 5V in 10us, TA=25°C 4
Load Transient (absolute output change) VTRLD 85 120 mV VIN = VOUT+1V, IOUT from 1mA to 500mA in 10us, TA = 25°C 4
Load Transient (absolute output change) VTRLD 50 120 mV VIN = VOUT+1V, IOUT from 500mA to 1mA in 10us, TA = 25°C 4
Over Current Limit ILMT 600 700 900 mA VIN = VOUT+1V, TA = 25°C 4
Short Current Limit ISHORT 70 110 180 mA VOUT = 0V, TA = 25°C 5
Power Supply Rejection Ratio PSRR 50 80 dB f = 1kHz, COUT = 1µF, IOUT = 20mA, VIN = VOUT+1V, TA = 25°C 5
Output Noise eN 40 70 µVRMS 10Hz to 100kHz, IOUT = 30mA, COUT = 1µF, TA = 25°C 5
EN Low Threshold VENL 0.4 V VIN = 1.2 to 5V 5
EN High Threshold VENH 0.9 V VIN = 1.2 to 5V 5
CE Pull-down Current ICE 0.2 0.7 1 µA VIN = VCE = VOUT+1V, TA = 25°C 5
Output resistance of auto discharge at off state RLOW 20 40 80 Ω VEN = 0V, VIN = 2V, IOUT = 10mA 5
Thermal Shutdown Temperature TTSD 160 °C Junction Temperature 5
Thermal Shutdown Temperature, released TTSR 140 °C Junction Temperature 5
Input Voltage -0.3 6 V 3
Input Voltage (CE Pin) -0.3 6 V 3
Output Voltage -0.3 V Upper limit printed as VIN+0.3 V 3
Maximum Load Current 500 mA 3
Maximum Power Consumption 600 mW 3
Operating Junction Temperature -40 150 °C 3
Storage Temperature -65 150 °C 3
Lead Temperature (Soldering) 300 °C Soldering, 10 sec 3
ESD HBM -4000 4000 V ESDA/JEDEC JS-001-2017 3
ESD CDM -1500 1500 V ESDA/JEDEC JS-002-2014 3
Input Voltage (recommended) VIN 1.2 5 V 3
Output Current (recommended) IOUT 0 500 mA 3
Operating Ambient Temperature TA -40 85 °C 3
Effective Input Ceramic Capacitor Value CIN 0.47 10 µF 3
Effective Output Ceramic Capacitor Value COUT 0.47 10 µF 3
Input and Output Capacitor Equivalent Series Resistance ESR 5 100 mΩ 3

CAD (KiCad official)

  • Symbol: SK6054D4-08
  • Footprint: Package_DFN_QFN:UDFN-4-1EP_1x1mm_P0.65mm_EP0.48x0.48mm
  • 3D model: DFN-4(1x1) (KiCad packages3D, STEP)
  • 3D model files: sk6054d4-08-etched.step / sk6054d4-08-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sk6054d4-08.step / sk6054d4-08.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Suntek datasheet (10 pp, sha256 79f7a251339bb445, retrieved 2026-10-20, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF