SK6019AD4-28
Public Made by Adomby adom
Suntek Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, XDFN-4-EP(1x1). Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
SK6019AD4-28
Suntek · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · XDFN-4-EP(1x1)
SK6019AD4-28 from Suntek, in a XDFN-4-EP(1x1). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUT | power_out | Regulated LDO output. Factory-set to 2.8V for the -28 suffix (1.0V-3.6V in 0.1V steps for the family). Requires a 1µF ceramic output capacitor to GND for stability; supports up to 750mA (typ. 700mA) with a fast active-discharge path enabled when EN is low. |
| 2 | GND | power_in | Device ground reference. Also connected to the thermal pad on the package underside, which must be soldered to the PCB ground plane for proper heat dissipation. |
| 3 | EN | input | Enable input, active high. Logic high (VIH ≥ 1.2V, up to VIN) turns the regulator on; logic low (VIL ≤ 0.4V) shuts it down (ISHDN < 1µA) and activates the VOUT discharge path. Must not be left floating. Input current ≤ 1µA over 0-5.5V. |
| 4 | VIN | power_in | Unregulated supply input, 2.5V to 6.5V (absolute max 8V). Requires a 1µF ceramic bypass capacitor to GND close to the pin. Dropout is typ. 110mV at IOUT = 200mA. |
| 5 | EP | power_in | Exposed thermal pad on the underside of the DFN1x1-4L package, electrically connected to GND. Must be soldered to the PCB ground copper for thermal performance and mechanical reliability. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Suntek |
| Package | XDFN-4-EP(1x1) |
| Category | PMIC |
| Pins | 5 |
Ordering variants
Same part, different packaging or reel option.
SK6019AD4-XXSK6019AD4-28
CAD (KiCad official)
- Symbol:
SK6019AD4-28 - Footprint:
Package_DFN_QFN:OnSemi_XDFN4-1EP_1.0x1.0mm_EP0.52x0.52mm - 3D model: XDFN-4-EP(1x1) (KiCad packages3D, STEP)
- 3D model files:
sk6019ad4-28-etched.step/sk6019ad4-28-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sk6019ad4-28.step/sk6019ad4-28.glbare the bare package body.
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
sk6019ad4-28.step |
144 KB | You want the bare part, or you mark your own boards. |
sk6019ad4-28-etched.step |
2.2 MB | You want the part with SK6019AD4-28 already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 530 faces against 41 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Suntek datasheet (8 pp, sha256
151d8627fd2b92d5, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SK6019AD4-28
**Suntek** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · XDFN-4-EP(1x1)
SK6019AD4-28 from Suntek, in a XDFN-4-EP(1x1). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUT | power_out | Regulated LDO output. Factory-set to 2.8V for the -28 suffix (1.0V-3.6V in 0.1V steps for the family). Requires a 1µF ceramic output capacitor to GND for stability; supports up to 750mA (typ. 700mA) with a fast active-discharge path enabled when EN is low. |
| 2 | GND | power_in | Device ground reference. Also connected to the thermal pad on the package underside, which must be soldered to the PCB ground plane for proper heat dissipation. |
| 3 | EN | input | Enable input, active high. Logic high (VIH ≥ 1.2V, up to VIN) turns the regulator on; logic low (VIL ≤ 0.4V) shuts it down (ISHDN < 1µA) and activates the VOUT discharge path. Must not be left floating. Input current ≤ 1µA over 0-5.5V. |
| 4 | VIN | power_in | Unregulated supply input, 2.5V to 6.5V (absolute max 8V). Requires a 1µF ceramic bypass capacitor to GND close to the pin. Dropout is typ. 110mV at IOUT = 200mA. |
| 5 | EP | power_in | Exposed thermal pad on the underside of the DFN1x1-4L package, electrically connected to GND. Must be soldered to the PCB ground copper for thermal performance and mechanical reliability. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Suntek |
| Package | XDFN-4-EP(1x1) |
| Category | PMIC |
| Pins | 5 |
## Ordering variants
Same part, different packaging or reel option.
- `SK6019AD4-XX`
- `SK6019AD4-28`
## CAD (KiCad official)
- Symbol: `SK6019AD4-28`
- Footprint: `Package_DFN_QFN:OnSemi_XDFN4-1EP_1.0x1.0mm_EP0.52x0.52mm`
- 3D model: XDFN-4-EP(1x1) (KiCad packages3D, STEP)
- 3D model files: `sk6019ad4-28-etched.step` / `sk6019ad4-28-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sk6019ad4-28.step` / `sk6019ad4-28.glb` are the bare package body.
## 3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
| [`sk6019ad4-28.step`](sk6019ad4-28.step) | 144 KB | You want the bare part, or you mark your own boards. |
| [`sk6019ad4-28-etched.step`](sk6019ad4-28-etched.step) | 2.2 MB | You want the part with `SK6019AD4-28` already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a
texture or a decal: 530 faces against 41 in the bare model. It
survives export, section views, and rendering in any CAD tool, and it drops straight
into KiCad or Fusion with no extra setup.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Suntek datasheet](docs/sk6019ad4-28-datasheet.pdf) (8 pp, sha256 `151d8627fd2b92d5`, retrieved 2026-08-17, tier: lcsc)
- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/sk6019ad4-28-datasheet.pdf)