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SK6011D4-30

Public Made by Adom

by adom

Suntek Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, DFN-4-EP(1x1). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SK6011D4-30

Suntek · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · DFN-4-EP(1x1)

SK6011D4-30 from Suntek, in a DFN-4-EP(1x1). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT power_out Regulated output pin; bypass with a 1μF ceramic capacitor from this pin to ground.
2 GND power_in Ground.
3 EN input Enable control input, active high (VIH 1.2V min, VIL 0.4V max); do not leave EN floating.
4 IN power_in Supply input (1.9V to 5.5V); must be closely decoupled to GND with a 1μF or greater ceramic capacitor.
5 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Suntek
Package DFN-4-EP(1x1)
Category Power Management (PMIC)
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Voltage Range VIN 1.9 5.5 V 4
Output Voltage Tolerance ΔVOUT -2 2 %VOUT VIN = 2.8 V to 5.5 V, IOUT = 1 mA to 300 mA 4
Load Current ILOAD 300 mA 4
Input Shutdown Quiescent Current ISHDN 0.2 1 μA VEN = 0 V 4
Input Quiescent Current IQ 15 25 μA VEN = 1.2V, VIN = VOUT +1V, IOUT = 0mA 4
Output Current Limit ILMT 400 600 mA RLOAD=1Ω, TA=25℃ 4
EN Input Logic Low Voltage VIL 0.4 V VIN = 1.9 V to 5.5 V, VEN falling until the output is disabled 4
EN Input Logic High Voltage VIH 1.2 V VIN = 1.9 V to 5.5 V, VEN rising until the output is enabled 4
EN Input leakage current IEN 0.01 1 μA VIN = 5.5 V, VEN = 0 V 4
Output Turn-on Time tON 70 150 μs From VEN > VIH to VOUT = 95% of VOUT(SET) 5
IN Voltage VIN -0.3 6 V 3
Input Voltage (EN Pin) VEN -0.3 6 V 3
Output Voltage VOUT -0.3 V -0.3 to VIN+0.3 V 3
Maximum Power Consumption PD 600 mW Mounted on 40mm x 40mm 4-layer PCB, 1oz copper 3
Maximum Load Current IMAX 300 mA 3
Operating Junction Temperature TJ -40 150 °C 3
Storage Temperature TSTG -65 150 °C 3
Lead Temperature (Soldering, 10 sec) TSLOD 300 °C 10 sec 3
Input Voltage VIN 1.9 5.5 V 3
Output Current IOUT 0 300 mA 3
Operating Ambient Temperature TA -40 85 °C 3
Effective Input Ceramic Capacitor Value CIN 0.47 10 μF 3
Effective Output Ceramic Capacitor Value COUT 0.47 10 μF 3
Input and Output Capacitor ESR ESR 5 100 mΩ 3
Line Regulation 0.02 %/V VIN = 2.8 V to 5.5 V, IOUT = 1 mA 4
Load Regulation 40 mV IOUT = 1 mA to 300 mA 4
Short Current Limit ISHORT 60 mA VOUT = 0 V, TA=25℃ 4
PSRR PSRR 94 dB f = 100 Hz, IOUT = 1 mA 4
PSRR PSRR 90 dB f = 1 kHz, IOUT = 1 mA 4
PSRR PSRR 84 dB f = 10 kHz, IOUT = 1 mA 4
PSRR PSRR 71 dB f = 100 kHz, IOUT = 1 mA 4
PSRR PSRR 60 dB f = 1 MHz, IOUT = 1 mA 4
PSRR PSRR 82 dB f = 1 kHz, IOUT = 20 mA 4
PSRR PSRR 75 dB f = 10 kHz, IOUT = 20 mA 4
PSRR PSRR 55 dB f = 100 kHz, IOUT = 20 mA 4
PSRR PSRR 50 dB f = 1 MHz, IOUT = 20 mA 4
Output Noise Voltage eN 10 μVRMS BW = 10 Hz to 100 kHz, IOUT = 1 mA 4
Output Noise Voltage eN 6.5 μVRMS BW = 10 Hz to 100 kHz, IOUT = 300 mA 4
Output Discharge Resistance RLOW 50 Ω VEN = 0V, IOUT = 10mA 4
EN Input leakage current IEN 5.5 μA VIN = 5.5 V, VEN = 5.5 V 4
Thermal shutdown threshold TSHDN 155 °C TJ rising 4
Thermal shutdown hysteresis THYS 15 °C TJ falling from shutdown 4
Line transient ΔVOUT 10 mV VIN = (VOUT) + 1 V) to (VOUT + 1.6 V) in 10 μs 5
Load transient ΔVOUT 30 mV IOUT = 1 mA to 300 mA in 10 μs 5
Overshoot 5 % Overshoot on start-up, stated as percentage of VOUT(SET) 5

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts copper TSLOD Lead Temperature (Soldering, 10 sec) 300 °C Note (1): Rating at mounting on a board (PCB board dimension: 40mm x 40mm (4layer), copper: 1oz). 3

CAD (KiCad official)

  • Symbol: SK6011D4-30
  • Footprint: Package_DFN_QFN:UDFN-4-1EP_1x1mm_P0.65mm_EP0.48x0.48mm
  • 3D model: DFN-4-EP(1x1) (KiCad packages3D, STEP)
  • 3D model files: sk6011d4-30-etched.step / sk6011d4-30-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sk6011d4-30.step / sk6011d4-30.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Suntek datasheet (12 pp, sha256 a92c9db404272354, retrieved 2026-10-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF