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SK4554D8-435

Public Made by Adom

by adom

Suntek Battery Management ICs, DFN-8(2x2). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SK4554D8-435

Suntek · Battery Management ICs · DFN-8(2x2)

SK4554D8-435 from Suntek, in a DFN-8(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Power input (absolute maximum -0.3 to 27V, operating 4.55 to 6.10V, charging disabled above the ~6.8V OVP threshold) that wants a 1µF or larger X5R ceramic decoupling capacitor close to the pin.
2 PPR output Open-drain power-presence indication, active low when VIN is above POR and below OVP, sinks 15mA (MIN) to drive an LED, maximum pin voltage 5.5V, independent of the EN input.
3 CHG output Open-drain charge indication that goes low when a charge cycle starts and high impedance when full-of-charge is qualified or the charger is disabled, sinks 15mA (MIN) to drive an LED.
4 EN input Enable input, drive high to disable the charger, low or floating enables it, with an internal 200kΩ pull-down resistor.
5 GND power_in System ground.
6 IMIN passive Full-of-charge current programming pin, a resistor RIMIN to GND sets IMIN = 9700/RIMIN + 4 (mA) with RIMIN in kΩ, programmable range 5mA to 120mA.
7 IREF passive Charge-current programming and monitoring pin, a resistor RIREF to GND sets IREF = 12000/RIREF (mA) with RIREF in kΩ, and its voltage monitors the actual charge current (VIREF = 0V when disabled).
8 BAT power_out Charger output pin connected to the battery, with a 1µF or larger X5R ceramic capacitor recommended, output disabled when EN is high.

Key specifications

Parameter Value
Manufacturer Suntek
Package DFN-8(2x2)
Category Power Supply Chip
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Rising POR Threshold VPOR 3.4 3.9 4.2 V VBAT=3.0V, RIREF=120KΩ 5
Falling POR Threshold VPOR 3.1 3.6 3.9 V VBAT=3.0V, RIREF=120KΩ 5
VIN-VBAT Offset Voltage Rising Edge VOS 100 150 mV VBAT=4.5V, RIREF=120KΩ 5
VIN-VBAT Offset Voltage Falling Edge VOS 10 80 mV VBAT=4.5V, RIREF=120KΩ 5
OVP Threshold VOVP 6.5 6.8 7.1 V VBAT=4.5V, RIREF=120KΩ 5
OVP Threshold Hysteresis VOVPHYS 170 250 300 mV 5
Standby Mode VIN Pin Current IVINSTD 135 200 μA VIN=5V, VBAT=4.5V, EN=L, RIREF=120KΩ 5
Standby Mode BAT Pin Current IBATSTD 1.7 2 μA VIN=5V, VBAT=4.5V, EN=L, RIREF=120KΩ 5
Shutdown Mode VIN Pin Current IVINDIS 130 200 μA VIN=5V, RIREF=120KΩ, Charger disabled 5
Output Voltage VOUT 4.306 4.35 4.394 V RIREF=120KΩ, 4.55V<VIN<6.10V, charge current=20mA 5
PMOS On Resistance RDS(ON) 1.2 Ω VBAT=3.8V, charge current=500mA, RIREF=10KΩ 5
IREF Constant Charge Current IREF 90 100 110 mA RIREF=120KΩ, VBAT=2.8V to 3.8V 5
Trickle Charge Current ITRK 13 22 31 mA RIREF=120KΩ, VBAT=2.4V 5
Full-of-Charge Current IMIN 22 44 66 mA RIMIN=243KΩ 5
FOC Rising Threshold ICHR 337 375 413 mA RIREF=24.3KΩ 5
Preconditioning Charge Threshold Voltage VMIN 2.55 2.65 2.75 V RIREF=24.3KΩ, VOUT=4.35V 6
Preconditioning Voltage Hysteresis VMINHYS 70 100 130 mV RIREF=24.3KΩ 6
EN Pin Logic Input High VEN_H 1.5 V 6
EN Pin Logic Input Low VEN_L 0.8 V 6
EN Pin Internal Pull Down Resistance REN 150 200 250 KΩ 6
CHG Sink Current when LOW ICHG_sink 10 18 mA Pin Voltage = 1V 6
CHG Leakage Current when High Impedance ICHG_leakage 1 μA VCHG = 5.5V 6
PPR Sink Current when LOW IPPR_sink 10 18 mA Pin Voltage = 1V 6
PPR Leakage Current when High Impedance IPPR_leakage 1 μA VPPR = 5.5V 6
Shutdown Mode VIN Pin Current IVINASD 92 μA VBAT=4.5V, VIN=4.3V 5
Shutdown Mode BAT Pin Current IBATASD 1.8 μA VBAT=4.5V, VIN=4.3V 5
UVLO Mode Supply Current IVINUVLO 88 μA VIN=VBAT=3.6V 5
UVLO Mode BAT Pin Current IBATUVLO 1 μA VIN=VBAT=3.6V 5
Sleep BAT Pin Current IBATSLEEP 1 μA Input is floating or 0V 5
IREF Pin Output Voltage VIREF 1.213 V VBAT=3.8V, RIREF=120KΩ 5
Charge Current Foldback Threshold TFOLD 115 ℃ 6
Input Voltage VIN -0.3 27 V 4
Voltage of other PINs -0.3 6 V 4
Junction Temperature TJ 150 ℃ 4
Storage Temperature TSTG -65 150 ℃ 4
Package Lead Soldering Temperature TSOLDER 260 ℃ 10s 4
ESD Machine Mode ESD MM 200 V 4
ESD Human Body Mode ESD HBM 8 KV 4
Thermal Resistance RθJA 118 ℃/W DFN-2x2-8L 4
Maximum Supply Voltage VMAX 24 V 4
Operating Supply Voltage VIN 4.55 6.1 V 4
Programmed Charge Current IREF 20 700 mA 4
Operating Temperature TOPT -40 85 ℃ 4

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing abs ESD HBM Human Body Mode 8 KV Note: Exceed these limits to damage to the device. Exposure to absolute maximum rating conditions may affect device reliability. 4

CAD (KiCad official)

  • Symbol: SK4554D8-435
  • Footprint: Package_DFN_QFN:DFN-8_2x2mm_P0.5mm
  • 3D model: DFN-8(2x2) (KiCad packages3D, STEP)
  • 3D model files: sk4554d8-435-etched.step / sk4554d8-435-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sk4554d8-435.step / sk4554d8-435.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Suntek datasheet (15 pp, sha256 968d77dee9d54351, retrieved 2026-10-22, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF