# SK22P04-P8

**Shikues** · MOSFETs · SOP-8

SK22P04-P8 from Shikues, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source of the P-channel MOSFET, tied to source pins 2 and 3. |
| 2 | S | passive | Source of the P-channel MOSFET, tied to source pins 1 and 3. |
| 3 | S | passive | Source of the P-channel MOSFET, tied to source pins 1 and 2. |
| 4 | G | input | Gate of the P-channel MOSFET; VGS absolute maximum ±20 V, threshold -1.0 to -2.0 V at ID=-250µA. |
| 5 | D | passive | Drain of the P-channel MOSFET, tied to drain pins 6, 7 and 8; VDS -40 V max, ID -22 A. |
| 6 | D | passive | Drain of the P-channel MOSFET, tied to drain pins 5, 7 and 8; VDS -40 V max, ID -22 A. |
| 7 | D | passive | Drain of the P-channel MOSFET, tied to drain pins 5, 6 and 8; VDS -40 V max, ID -22 A. |
| 8 | D | passive | Drain of the P-channel MOSFET, tied to drain pins 5, 6 and 7; VDS -40 V max, ID -22 A. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Shikues |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-source Voltage | VDS | -40 |  |  | V |  | 1 |
| Gate-source Voltage | VGS | -20 |  | 20 | V |  | 1 |
| Drain Current-Continuous | ID | -22 |  |  | A | note 1 | 1 |
| Operating Junction Temperature Range | TJ | -55 |  | 150 | ℃ |  | 1 |
| Storage Temperature Range | TSTG | -55 |  | 150 | ℃ |  | 1 |
| Drain-source Breakdown voltage | BVDSS | -40 |  |  | V | VGS=0V, ID=-250μA | 1 |
| Zero Gate Voltage Drain Current | IDSS |  |  | -1 | μA | VDS=-32V, VGS=0V | 1 |
| Zero Gate Voltage Drain Current | IDSS |  |  | -30 | μA | VDS=-32V, VGS=0V, TJ=85℃ | 1 |
| Gate-source leakage current | IGSS | -100 |  | 100 | nA | VGS=±20V, VDS=0V | 1 |
| Gate Threshold voltage | VGS(th) | -1 | -1.5 | -2 | V | VDS=VGS, ID=-250μA | 1 |
| Static Drain to Source on resistance | RDS(on) |  | 12 | 15 | mΩ | VGS= -10V, ID= -1A | 1 |
| Static Drain to Source on resistance | RDS(on) |  | 16 | 21 | mΩ | VGS= -4.5V, ID= -1A | 1 |
| Diode Forward Voltage | VSD |  | -0.7 | -1.3 | V | VGS=0V, IS=-0.5A | 1 |

## CAD (KiCad official)

- Symbol: `SK22P04-P8`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `sk22p04-p8-etched.step` / `sk22p04-p8-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sk22p04-p8.step` / `sk22p04-p8.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Shikues datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8757071859915329536) (2 pp, sha256 `e1d2589eadf1ec87`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/sk22p04-p8-datasheet.pdf)