component
SIT82C250T
Public Made by Adomby adom
SIT CAN ICs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSIT82C250T
SIT · CAN ICs · SOP-8
SIT82C250T from SIT, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | TXD | input | Transmit data input from the CAN controller; low drives the bus dominant, high or open gives recessive (VIH min 2 V, VIL max 0.8 V). |
| 2 | GND | power_in | Ground supply, the reference point for all voltages. |
| 3 | VCC | power_in | Supply voltage, 4.5 V to 5.5 V operating (absolute maximum -0.3 to +7 V). |
| 4 | RXD | output | Receive data output to the CAN controller; low when bus is dominant (VID≥0.9 V), high when recessive. |
| 5 | VREF | power_in | Reference voltage output, common-mode stabilization output of 0.3VCC to 0.7VCC at ±500 µA. |
| 6 | CANL | bidirectional | LOW-level CAN bus voltage input/output, withstands -8 V to +18 V. |
| 7 | CANH | bidirectional | HIGH-level CAN bus voltage input/output, withstands -8 V to +18 V. |
| 8 | Rs | input | Standby mode control input; grounded selects high-speed mode, high or open selects low-power standby mode. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | SIT |
| Package | SOP-8 |
| Category | Interface ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | -0.3 | 7 | V | 2 | ||
| MCU side port voltage TXD, RXD, VREF, Rs | -0.3 | V | max printed as VCC+0.3 | 2 | |||
| Bus side input voltage CANL, CANH | -8 | 18 | V | 2 | |||
| Transient voltage at pin 6, 7 | Vtr | -200 | 200 | V | See Fig 7 | 2 | |
| Storage temperature | Tstg | -55 | 150 | ℃ | 2 | ||
| Virtual junction temperature | Tj | -40 | 150 | ℃ | 2 | ||
| Ambient temperature | Tamb | -40 | 125 | ℃ | 2 | ||
| Welding temperature | 300 | ℃ | 2 | ||||
| Continuous power consumption | 400 | mW | SOP8 | 2 | |||
| Supply voltage | Vcc | 4.5 | 5.5 | V | 1 | ||
| CANH, CANL withstand voltage | Vcan | -8 | 18 | V | 1 | ||
| Bus differential voltage | Vdiff | 1.5 | 3 | V | 1 | ||
| Ambient temperature | Tamb | -40 | 125 | ℃ | 1 | ||
| CANH dominant output voltage | VOH(D) | 2.9 | 3.4 | 4.5 | V | VI=0V, Rs=0V, RL=60Ω, Fig 1, Fig 2 | 3 |
| CANL dominant output voltage | VOL(D) | 0.8 | 1.5 | V | VI=0V, Rs=0V, RL=60Ω, Fig 1, Fig 2 | 3 | |
| Bus recessive output voltage | VO(R) | 2 | 2.5 | 3 | V | VI=3V, Rs=0V, RL=60Ω, Fig 1, Fig 2 | 3 |
| Bus dominant differential output voltage | VOD(D) | 1.5 | 3 | V | VI=0V, Rs=0V, RL=60Ω, Fig 1, Fig 2 | 3 | |
| Bus recessive differential output voltage | VOD(R) | -0.012 | 0.012 | V | VI=3V, Rs=0V, Fig 1, Fig 2 | 3 | |
| Bus recessive differential output voltage, no load | VOD(R) | -0.5 | 0.05 | V | VI=3V, Rs=0V, NO LOAD | 3 | |
| Transmitter dominant voltage symmetry | Vdom(TX)sym | -400 | 400 | mV | Vdom(TX)sym=VCC- VCANH - VCANL | 3 | |
| Common-mode output voltage | VOC | 2 | 2.5 | 3 | V | Rs=0V, Fig 8 | 3 |
| Peak-to-peak common-mode output voltage | VOC | 30 | mV | 3 | |||
| Short-circuit output current | IOS | -105 | -72 | mA | CANH=-12V, CANL=open, Fig 10 | 3 | |
| Short-circuit output current | IOS | 0.36 | 1 | mA | CANH=12V, CANL=open, Fig 10 | 3 | |
| Short-circuit output current | IOS | -1 | 0.5 | mA | CANL=-12V, CANH=open, Fig 10 | 3 | |
| Short-circuit output current | IOS | 71 | 105 | mA | CANL=12V, CANH=open, Fig 10 | 3 | |
| Recessive output current | IO(R) | -2 | 2.5 | mA | -27V<CANH<32V, 0<VCC<5.25V | 3 | |
| Driver propagation delay, low-to-high | tPLH | 25 | 65 | 120 | ns | Rs=0V, Fig 4 | 4 |
| Driver propagation delay, high-to-low | tPHL | 25 | 45 | 90 | ns | Rs=0V, Fig 4 | 4 |
| Differential output signal rise time | tr | 25 | ns | Rs=0V, Fig 4 | 4 | ||
| Differential output signal fall time | tf | 50 | ns | Rs=0V, Fig 4 | 4 | ||
| Enable time from standby mode to dominant | tEN | 10 | μs | Fig 7 | 4 | ||
| Bus wake-up filter time | tBUS | 0.7 | 5 | μs | 4 | ||
| Positive-going input threshold voltage | VIT+ | 800 | 900 | mV | Rs=0V, Fig 5 | 4 | |
| Negative-going input threshold voltage | VIT- | 500 | 650 | mV | Rs=0V, Fig 5 | 4 | |
| Hysteresis voltage | VHYS | 100 | 125 | mV | Rs=0V, Fig 5 | 4 | |
| High-level output voltage | VOH | 4 | 4.6 | V | IO=-2mA, Fig 6 | 4 | |
| Low-level output voltage | VOL | 0.2 | 0.4 | V | IO=2mA, Fig 6 | 4 | |
| Power-off bus input current | I(OFF) | 5 | μA | CANH or CANL=5V, Other pin=0V | 4 | ||
| Input capacitance to ground | CI | 13 | pF | CANH or CANL | 4 | ||
| Differential input capacitance | CID | 5 | pF | 4 | |||
| Input resistance | RIN | 15 | 30 | 40 | kΩ | TXD=3V, Rs=0V | 4 |
| Differential input resistance | RID | 30 | 80 | kΩ | TXD=3V, Rs=0V | 4 | |
| Input resistance matching | RImatch | -3 | 3 | % | CANH=CANL | 4 | |
| Range of common-mode voltage | VCOM | -12 | 12 | V | 5 | ||
| Receiver propagation delay, low-to-high | tPLH | 60 | 100 | 130 | ns | Rs=0V or VCC, Fig 6 | 5 |
| Receiver propagation delay, high-to-low | tPHL | 45 | 70 | 90 | ns | Rs=0V or VCC, Fig 6 | 5 |
| RXD signal rise time | tr | 8 | ns | 5 | |||
| RXD signal fall time | tf | 8 | ns | 5 | |||
| Loop delay 1, recessive to dominant | td(LOOP1) | 90 | 190 | ns | Rs=0V, Fig 9 | 5 | |
| Loop delay 2, dominant to recessive | td(LOOP2) | 90 | 190 | ns | Rs=0V, Fig 9 | 5 | |
| Shutdown junction temperature | Tj(sd) | 160 | ℃ | 5 | |||
| HIGH-level input current | IIH(TXD) | -2 | 2 | μA | VI=VCC | 5 | |
| LOW-level input current | IIL(TXD) | -50 | -10 | μA | VI=0 | 5 | |
| Current on TXD pin when VCC=0V | IO(off) | 1 | μA | VCC=0V, TXD=5V | 6 | ||
| HIGH-level input voltage | VIH | 2 | V | upper limit printed as VCC+0.3 | 6 | ||
| LOW-level input voltage | VIL | -0.3 | 0.8 | V | 6 | ||
| Leakage current | IO(Rs) | -5 | 5 | μA | Rs=2V, -12V<VO<12V | 6 | |
| Supply current, standby | ICC | 5 | 12 | μA | Rs=VCC, VI=VCC | 6 | |
| Supply current, dominant | ICC | 50 | 70 | mA | VI=0V, Rs=0V, LOAD=60Ω | 6 | |
| Supply current, recessive | ICC | 6 | 10 | mA | VI=VCC, Rs=0V, NO LOAD | 6 | |
| CAN bus pin ESD HBM | VESD_HBM | -8 | 8 | kV | 6 |
CAD (KiCad official)
- Symbol:
SIT82C250T - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
sit82c250t-etched.step/sit82c250t-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sit82c250t.step/sit82c250t.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: SIT datasheet (16 pp, sha256
e1b78d33f98fe943, retrieved 2026-10-22, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).