component
SIT8008BI-73-XXS-12.000000E
Public Made by Adomby adom
SiTime Pre-programmed Oscillators, SMD2016-4P. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SIT8008BI-73-XXS-12.000000E
SiTime · Pre-programmed Oscillators · SMD2016-4P
SIT8008BI-73-XXS-12.000000E from SiTime, in a SMD2016-4P. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | ST | input | Output Enable (H: output active, L: output high-impedance), Standby (L: output low via weak pull-down, supply current reduces to I_std), or No Connect (no function); VIH min 70% Vdd, VIL max 30% Vdd, and if left floating use the NC option. |
| 2 | GND | power_in | Electrical ground. |
| 3 | OUT | output | LVCMOS oscillator output. |
| 4 | VDD | power_in | Power supply voltage (1.62 V to 3.63 V depending on option) requiring a 0.1 µF or higher capacitor between Vdd and GND. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | SiTime |
| Package | SMD2016-4P |
| Category | Crystals/Oscillators/Resonators |
| Pins | 4 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage (Vdd_XX) | Vdd_XX | 2.25 | 3.63 | V | 1 | ||
| Operating Temperature Range (Industrial) | T_use | -40 | 85 | °C | Industrial | 1 | |
| Output Frequency | f | 12 | MHz | Nominal frequency of this MPN; range 1 to 110 MHz | 1 | ||
| Output Frequency Range | f | 1 | 110 | MHz | 1 | ||
| Current Consumption | Idd | 3.8 | 4.5 | mA | No load condition, f = 20 MHz, Vdd_XX | 1 | |
| OE Disable Current | I_OD | 4.2 | mA | Vdd_XX, OE = GND, Output in high-Z state | 1 | ||
| Standby Current | I_std | 2.1 | 4.3 | µA | ST = GND, Vdd_XX, Output is weakly pulled down | 1 | |
| Duty Cycle | DC | 45 | 55 | % | All Vdds | 2 | |
| Rise/Fall Time | Tr, Tf | 2 | ns | 20% - 80% Vdd_XX | 2 | ||
| Output High Voltage | VOH | 90 | % Vdd | 2 | |||
| Output Low Voltage | VOL | 10 | % Vdd | 2 | |||
| Input High Voltage | VIH | 70 | % Vdd | Pin 1, OE or ST | 2 | ||
| Input Low Voltage | VIL | 30 | % Vdd | Pin 1, OE or ST | 2 | ||
| Input Pull-up Impedance | Z_in | 50 | 87 | 150 | kΩ | Pin 1, OE logic high or logic low, or ST logic high | 2 |
| Input Impedance, ST low | Z_in | 2 | MΩ | Pin 1, ST logic low | 2 | ||
| Startup Time | T_start | 5 | ms | Measured from the time Vdd reaches its rated minimum value | 2 | ||
| Enable/Disable Time | T_oe | 130 | ns | f = 110 MHz. For other frequencies, T_oe = 100 ns + 3 * cycles | 2 | ||
| Resume Time | T_resume | 5 | ms | Measured from the time ST pin crosses 50% threshold | 2 | ||
| RMS Period Jitter | T_jitt | 1.8 | 3 | ps | f = 75 MHz, Vdd_XX | 2 | |
| Peak-to-peak Period Jitter | T_pk | 12 | 25 | ps | f = 75 MHz, Vdd_XX | 2 | |
| RMS Phase Jitter (random) | T_phj | 0.5 | 0.9 | ps | f = 75 MHz, Integration bandwidth = 900 kHz to 7.5 MHz. Vdd_XX | 2 | |
| RMS Phase Jitter (random) | T_phj | 1.3 | 2 | ps | f = 75 MHz, Integration bandwidth = 12 kHz to 20 MHz. Vdd_XX | 2 | |
| Storage Temperature | -65 | 150 | °C | 3 | |||
| Supply Voltage (abs max) | Vdd | -0.5 | 4 | V | 3 | ||
| Electrostatic Discharge | 2000 | V | 3 | ||||
| Soldering Temperature | 260 | °C | follow standard Pb free soldering guidelines | 3 | |||
| Junction Temperature | 150 | °C | 3 | ||||
| Maximum Operating Junction Temperature | 95 | °C | Max operating ambient temperature 85°C | 3 | |||
| Thermal Resistance Junction-Ambient, 4 Layer Board (2016) | θJA | 152 | °C/W | 2016 package, 4 layer board | 3 | ||
| Thermal Resistance Junction-Ambient, 2 Layer Board (2016) | θJA | 252 | °C/W | 2016 package, 2 layer board | 3 | ||
| Thermal Resistance Junction-Case, Bottom (2016) | θJC | 36 | °C/W | 2016 package, bottom | 3 |
CAD (KiCad official)
- Symbol:
SIT8008BI-73-XXS-12.000000E - Footprint:
Crystal:Crystal_SMD_2016-4Pin_2.0x1.6mm - 3D model: SMD2016-4P (KiCad packages3D, STEP)
- 3D model files:
sit8008bi-73-xxs-12-000000e-etched.step/sit8008bi-73-xxs-12-000000e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sit8008bi-73-xxs-12-000000e.step/sit8008bi-73-xxs-12-000000e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: SiTime datasheet (17 pp, sha256
ea4a3c7ea2e6d0c0, retrieved 2026-10-27, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SIT8008BI-73-XXS-12.000000E
**SiTime** · Pre-programmed Oscillators · SMD2016-4P
SIT8008BI-73-XXS-12.000000E from SiTime, in a SMD2016-4P. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | ST | input | Output Enable (H: output active, L: output high-impedance), Standby (L: output low via weak pull-down, supply current reduces to I_std), or No Connect (no function); VIH min 70% Vdd, VIL max 30% Vdd, and if left floating use the NC option. |
| 2 | GND | power_in | Electrical ground. |
| 3 | OUT | output | LVCMOS oscillator output. |
| 4 | VDD | power_in | Power supply voltage (1.62 V to 3.63 V depending on option) requiring a 0.1 µF or higher capacitor between Vdd and GND. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | SiTime |
| Package | SMD2016-4P |
| Category | Crystals/Oscillators/Resonators |
| Pins | 4 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage (Vdd_XX) | Vdd_XX | 2.25 | | 3.63 | V | | 1 |
| Operating Temperature Range (Industrial) | T_use | -40 | | 85 | °C | Industrial | 1 |
| Output Frequency | f | | 12 | | MHz | Nominal frequency of this MPN; range 1 to 110 MHz | 1 |
| Output Frequency Range | f | 1 | | 110 | MHz | | 1 |
| Current Consumption | Idd | | 3.8 | 4.5 | mA | No load condition, f = 20 MHz, Vdd_XX | 1 |
| OE Disable Current | I_OD | | | 4.2 | mA | Vdd_XX, OE = GND, Output in high-Z state | 1 |
| Standby Current | I_std | | 2.1 | 4.3 | µA | ST = GND, Vdd_XX, Output is weakly pulled down | 1 |
| Duty Cycle | DC | 45 | | 55 | % | All Vdds | 2 |
| Rise/Fall Time | Tr, Tf | | | 2 | ns | 20% - 80% Vdd_XX | 2 |
| Output High Voltage | VOH | 90 | | | % Vdd | | 2 |
| Output Low Voltage | VOL | | | 10 | % Vdd | | 2 |
| Input High Voltage | VIH | 70 | | | % Vdd | Pin 1, OE or ST | 2 |
| Input Low Voltage | VIL | | | 30 | % Vdd | Pin 1, OE or ST | 2 |
| Input Pull-up Impedance | Z_in | 50 | 87 | 150 | kΩ | Pin 1, OE logic high or logic low, or ST logic high | 2 |
| Input Impedance, ST low | Z_in | 2 | | | MΩ | Pin 1, ST logic low | 2 |
| Startup Time | T_start | | | 5 | ms | Measured from the time Vdd reaches its rated minimum value | 2 |
| Enable/Disable Time | T_oe | | | 130 | ns | f = 110 MHz. For other frequencies, T_oe = 100 ns + 3 * cycles | 2 |
| Resume Time | T_resume | | | 5 | ms | Measured from the time ST pin crosses 50% threshold | 2 |
| RMS Period Jitter | T_jitt | | 1.8 | 3 | ps | f = 75 MHz, Vdd_XX | 2 |
| Peak-to-peak Period Jitter | T_pk | | 12 | 25 | ps | f = 75 MHz, Vdd_XX | 2 |
| RMS Phase Jitter (random) | T_phj | | 0.5 | 0.9 | ps | f = 75 MHz, Integration bandwidth = 900 kHz to 7.5 MHz. Vdd_XX | 2 |
| RMS Phase Jitter (random) | T_phj | | 1.3 | 2 | ps | f = 75 MHz, Integration bandwidth = 12 kHz to 20 MHz. Vdd_XX | 2 |
| Storage Temperature | | -65 | | 150 | °C | | 3 |
| Supply Voltage (abs max) | Vdd | -0.5 | | 4 | V | | 3 |
| Electrostatic Discharge | | | | 2000 | V | | 3 |
| Soldering Temperature | | | | 260 | °C | follow standard Pb free soldering guidelines | 3 |
| Junction Temperature | | | | 150 | °C | | 3 |
| Maximum Operating Junction Temperature | | | | 95 | °C | Max operating ambient temperature 85°C | 3 |
| Thermal Resistance Junction-Ambient, 4 Layer Board (2016) | θJA | | 152 | | °C/W | 2016 package, 4 layer board | 3 |
| Thermal Resistance Junction-Ambient, 2 Layer Board (2016) | θJA | | 252 | | °C/W | 2016 package, 2 layer board | 3 |
| Thermal Resistance Junction-Case, Bottom (2016) | θJC | | 36 | | °C/W | 2016 package, bottom | 3 |
## CAD (KiCad official)
- Symbol: `SIT8008BI-73-XXS-12.000000E`
- Footprint: `Crystal:Crystal_SMD_2016-4Pin_2.0x1.6mm`
- 3D model: SMD2016-4P (KiCad packages3D, STEP)
- 3D model files: `sit8008bi-73-xxs-12-000000e-etched.step` / `sit8008bi-73-xxs-12-000000e-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sit8008bi-73-xxs-12-000000e.step` / `sit8008bi-73-xxs-12-000000e.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [SiTime datasheet](docs/sit8008bi-73-xxs-12-000000e-datasheet.pdf) (17 pp, sha256 `ea4a3c7ea2e6d0c0`, retrieved 2026-10-27, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/sit8008bi-73-xxs-12-000000e-datasheet.pdf)