component
SiT8008AI-22-33E-6.144000
Public Made by Adomby adom
SiTime Pre-programmed Oscillators, SMD3225-4P. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSiT8008AI-22-33E-6.144000
SiTime · Pre-programmed Oscillators · SMD3225-4P
SiT8008AI-22-33E-6.144000 from SiTime, in a SMD3225-4P. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OE/ST | input | Output enable or standby control input (H or open: specified frequency output; L: output high impedance in OE mode, or output weakly pulled low and sleep mode with supply current reduced to I_std in ST mode), with VIH min 70% Vdd and VIL max 30% Vdd. |
| 2 | GND | power_in | Electrical ground, with a 0.1 µF capacitor between Vdd and GND recommended. |
| 3 | OUT | output | Oscillator LVCMOS output. |
| 4 | VDD | power_in | Power supply voltage (3.3V ±10% for this part, 2.97 V to 3.63 V; absolute maximum 4 V), with a 0.1 µF capacitor to GND recommended. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | SiTime |
| Package | SMD3225-4P |
| Category | Crystal Oscillator/Oscillator/Resonator |
| Pins | 4 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Frequency Stability | F_stab | -25 | 25 | PPM | Inclusive of initial tolerance at 25°C, 1st year aging at 25°C, and variations over operating temperature, rated power supply voltage and load (15 pF ± 10%) | 1 | |
| Operating Temperature Range (Industrial) | T_use | -40 | 85 | °C | Industrial | 1 | |
| Supply Voltage | Vdd | 2.97 | 3.3 | 3.63 | V | 1 | |
| Current Consumption | Idd | 3.8 | 4.5 | mA | No load condition, f = 20 MHz, Vdd = 2.8V, 3.0V, 3.3V, 2.25V to 3.63V | 1 | |
| OE Disable Current | I_OD | 4 | mA | Vdd = 2.5V to 3.3V, OE = GND, output is Weakly Pulled Down | 1 | ||
| Standby Current | I_std | 2.6 | 4.3 | µA | ST = GND, Vdd = 2.8V to 3.3V, Output is Weakly Pulled Down | 1 | |
| Duty Cycle | DC | 45 | 55 | % | All Vdds | 1 | |
| Rise/Fall Time | Tr, Tf | 1 | 2 | ns | Vdd = 2.5V, 2.8V, 3.0V or 3.3V, 20% - 80% | 1 | |
| Output High Voltage | VOH | 90 | Vdd | IOH = -4 mA (Vdd = 3.0V or 3.3V); value in % of Vdd | 1 | ||
| Output Low Voltage | VOL | 10 | Vdd | IOL = 4 mA (Vdd = 3.0V or 3.3V); value in % of Vdd | 1 | ||
| Input High Voltage | VIH | 70 | Vdd | Pin 1, OE or ST; value in % of Vdd | 1 | ||
| Input Low Voltage | VIL | 30 | Vdd | Pin 1, OE or ST; value in % of Vdd | 1 | ||
| Input Pull-up Impedance | Z_in | 87 | 100 | kΩ | Pin 1, OE logic high or logic low, or ST logic high | 1 | |
| Startup Time | T_start | 5 | ms | Measured from the time Vdd reaches its rated minimum value | 2 | ||
| Enable/Disable Time | T_oe | 130 | ns | f = 110 MHz. For other frequencies, T_oe = 100 ns + 3 * cycles | 2 | ||
| RMS Period Jitter | T_jitt | 1.76 | 3 | ps | f = 75 MHz, Vdd = 2.5V, 2.8V, 3.0V or 3.3V | 2 | |
| RMS Phase Jitter (random) | T_phj | 0.5 | 0.9 | ps | f = 75 MHz, Integration bandwidth = 900 kHz to 7.5 MHz | 2 | |
| RMS Phase Jitter (random) | T_phj | 1.3 | 2 | ps | f = 75 MHz, Integration bandwidth = 12 kHz to 20 MHz | 2 | |
| Storage Temperature | -65 | 150 | °C | 2 | |||
| Supply Voltage (absolute maximum) | VDD | -0.5 | 4 | V | 2 | ||
| Electrostatic Discharge | 2000 | V | 2 | ||||
| Soldering Temperature | 260 | °C | follow standard Pb free soldering guidelines | 2 | |||
| Junction Temperature | 150 | °C | 2 | ||||
| Input Pull-down Impedance in Standby (ST low) | Z_in | 2 | MΩ | Pin 1, ST logic low | 1 | ||
| Thermal Resistance Junction-Ambient, 4 Layer Board (3225) | θJA | 109 | °C/W | 3225 package, 4 Layer Board | 2 | ||
| Thermal Resistance Junction-Ambient, 2 Layer Board (3225) | θJA | 212 | °C/W | 3225 package, 2 Layer Board | 2 | ||
| Thermal Resistance Junction-Case, Bottom (3225) | θJC | 27 | °C/W | 3225 package, Bottom | 2 |
CAD (KiCad official)
- Symbol:
SiT8008AI-22-33E-6.144000 - Footprint:
Crystal:Crystal_SMD_3225-4Pin_3.2x2.5mm - 3D model: SMD3225-4P (KiCad packages3D, STEP)
- 3D model files:
sit8008ai-22-33e-6-144000-etched.step/sit8008ai-22-33e-6-144000-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sit8008ai-22-33e-6-144000.step/sit8008ai-22-33e-6-144000.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: SiTime datasheet (16 pp, sha256
0b5cfe117adfb0e5, retrieved 2026-10-27, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).