main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 12h ago
viewers sit8008ac-71-18e-12-288000d: viewers · Ray 12h ago
package.json Publish 0.1.0 · Ray 12h ago
page.json Set visibility: public · Ray 12h ago
README.md Publish 0.1.0 · Ray 12h ago
sit8008ac-71-18e-12-288000d-etched.glb Publish 0.1.0 · Ray 12h ago
sit8008ac-71-18e-12-288000d-etched.step sit8008ac-71-18e-12-288000d: factory component page (tier=lcsc) · Ray 12h ago
sit8008ac-71-18e-12-288000d-hero.glb sit8008ac-71-18e-12-288000d: hero GLB from the etched model (keeps the MPN mark) · Ray 12h ago
sit8008ac-71-18e-12-288000d-hero.overlay.json Publish 0.1.0 · Ray 12h ago
sit8008ac-71-18e-12-288000d.glb Publish 0.1.0 · Ray 12h ago
sit8008ac-71-18e-12-288000d.kicad_mod Publish 0.1.0 · Ray 12h ago
sit8008ac-71-18e-12-288000d.kicad_sym Publish 0.1.0 · Ray 12h ago
sit8008ac-71-18e-12-288000d.lbr Publish 0.1.0 · Ray 12h ago
sit8008ac-71-18e-12-288000d.step Publish 0.1.0 · Ray 12h ago

SIT8008AC-71-18E-12.288000D

SiTime · Pre-programmed Oscillators · SMD2016-4P

SIT8008AC-71-18E-12.288000D from SiTime, in a SMD2016-4P. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE/ST input Output enable or standby control: H or open gives specified frequency output; L disables the output (high impedance in OE mode, or low with weak pull-down and sleep mode in ST mode, supply current reduces to I_std); VIH 70% Vdd min, VIL 30% Vdd max.
2 GND power_in Electrical ground; a 0.1 µF capacitor between Vdd and GND is recommended.
3 OUT output Oscillator LVCMOS/HCMOS output.
4 VDD power_in Power supply voltage, 1.62 V to 1.98 V for the 1.8 V option (absolute maximum -0.5 V to 4 V); a 0.1 µF capacitor to GND is recommended.

Key specifications

Parameter Value
Manufacturer SiTime
Package SMD2016-4P
Category Crystals/Oscillators/Resonators
Pins 4

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Frequency Stability F_stab -20 20 PPM Inclusive of Initial tolerance at 25°C, 1st year aging at 25°C, and variations over operating temperature, rated power supply voltage and load (15 pF ± 10%) 1
Supply Voltage Vdd 1.62 1.8 1.98 V 1.8V option 1
Operating Temperature Range T_use -20 70 °C Extended Commercial 1
Current Consumption Idd 3.4 3.9 mA No load condition, f = 20 MHz, Vdd = 1.8V 1
OE Disable Current I_OD 3.8 mA Vdd = 1.8V, OE = GND, output is Weakly Pulled Down 1
Standby Current I_std 0.6 1.3 A ST = GND, Vdd = 1.8V, Output is Weakly Pulled Down 1
Duty Cycle DC 45 55 % All Vdds 1
Rise/Fall Time Tr, Tf 1.3 2.5 ns Vdd =1.8V, 20% - 80% 1
Output High Voltage VOH 90 Vdd IOH = -2 mA (Vdd = 1.8V); value printed as 90% Vdd 1
Output Low Voltage VOL 10 Vdd IOL = 2 mA (Vdd = 1.8V); value printed as 10% Vdd 1
Input High Voltage VIH 70 Vdd Pin 1, OE or ST; value printed as 70% Vdd 1
Input Low Voltage VIL 30 Vdd Pin 1, OE or ST; value printed as 30% Vdd 1
Input Pull-up Impedance Z_in 87 100 kΩ Pin 1, OE logic high or logic low, or ST logic high 1
Input Pull-up Impedance (ST low) Z_in 2 MΩ Pin 1, ST logic low 1
Output Frequency Range f 1 110 MHz 1
Startup Time T_start 5 ms Measured from the time Vdd reaches its rated minimum value 2
Enable/Disable Time T_oe 130 ns f = 110 MHz. For other frequencies, T_oe = 100 ns + 3 * cycles 2
Resume Time T_resume 5 ms Measured from the time ST pin crosses 50% threshold 2
RMS Period Jitter T_jitt 1.78 3 ps f = 75 MHz, Vdd = 1.8V 2
RMS Phase Jitter (random) T_phj 0.5 0.9 ps f = 75 MHz, Integration bandwidth = 900 kHz to 7.5 MHz 2
RMS Phase Jitter (random) T_phj 1.3 2 ps f = 75 MHz, Integration bandwidth = 12 kHz to 20 MHz 2
Storage Temperature -65 150 °C 2
VDD VDD -0.5 4 V 2
Electrostatic Discharge 2000 V 2
Soldering Temperature 260 °C follow standard Pb free soldering guidelines 2
Junction Temperature 150 °C 2
Thermal Resistance Junction-Ambient, 2016, 4 Layer Board θJA 124 °C/W 2016 package, 4 layer board 2
Thermal Resistance Junction-Ambient, 2016, 2 Layer Board θJA 227 °C/W 2016 package, 2 layer board 2
Thermal Resistance Junction-Case (Bottom), 2016 θJC 26 °C/W 2016 package, bottom 2

CAD (KiCad official)

  • Symbol: SIT8008AC-71-18E-12.288000D
  • Footprint: Crystal:Crystal_SMD_2016-4Pin_2.0x1.6mm
  • 3D model: SMD2016-4P (KiCad packages3D, STEP)
  • 3D model files: sit8008ac-71-18e-12-288000d-etched.step / sit8008ac-71-18e-12-288000d-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sit8008ac-71-18e-12-288000d.step / sit8008ac-71-18e-12-288000d.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: SiTime datasheet (16 pp, sha256 0b5cfe117adfb0e5, retrieved 2026-10-27, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF