component
SIT65HVD235DR
Public Made by Adomby adom
SIT CAN Transceivers, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSIT65HVD235DR
SIT · CAN Transceivers · SOP-8
SIT65HVD235DR from SIT, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | D | input | CAN transmit data (TXD) driver input; LOW drives the bus dominant and HIGH leaves it recessive, with MCU-side voltage limited to -0.5 V to VCC+0.5 V. |
| 2 | GND | power_in | Ground reference for the transceiver; the datasheet states that the reference point for all voltages is ground. |
| 3 | VCC | power_in | Transceiver 3.3 V supply, specified at VCC = 3.3 V ±10% (absolute maximum supply -0.3 V to +6 V). |
| 4 | R | output | CAN receive data (RXD) output; LOW for dominant and HIGH for recessive bus states, with output current rated -11 mA to +11 mA. |
| 5 | AB | input | Automatic baud rate loop mode control; driving it HIGH disables the driver and adds an internal D-to-R loopback, and it is internally pulled down (default low) when left open. |
| 6 | CANL | bidirectional | Low-level CAN bus line; bus-side input/output voltage limited to -36 V to +36 V. |
| 7 | CANH | bidirectional | High-level CAN bus line; bus-side input/output voltage limited to -36 V to +36 V. |
| 8 | RS | input | Mode select: pull to GND for high-speed mode, pull above 0.75VCC for low-power standby, or connect a 10 kΩ to 100 kΩ resistor to GND for slope-control mode. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | SIT |
| Package | SOP-8 |
| Category | Interface |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | Vcc | 3 | 3.6 | V | 1 | ||
| Bus differential voltage | Vdiff | 1.5 | 3 | V | 1 | ||
| Supply voltage (absolute maximum) | VCC | -0.3 | 6 | V | 2 | ||
| MCU side voltage D, R | -0.5 | V | 2 | ||||
| Bus side input voltage CANL, CANH | -36 | 36 | V | 2 | |||
| Transient voltage on pins CANH, CANL | Vtr | -40 | 40 | V | test with 100Ω; see Fig 11 | 2 | |
| Receiver output current | IO | -11 | 11 | mA | 2 | ||
| Storage temperature | Tstg | -40 | 150 | ℃ | 2 | ||
| Virtual junction temperature (absolute maximum) | Tj | -40 | 125 | ℃ | 2 | ||
| Output voltage (Dominant), CANH | VO(D) | 2.45 | V | VI=0V, RS=0V, RL=60Ω; Fig 1, Fig 2 | 3 | ||
| Output voltage (Dominant), CANL | VO(D) | 0.5 | 1.25 | V | 3 | ||
| Differential output voltage (Dominant) | VOD(D) | 1.5 | 2 | 3 | V | VI=0V, RS=0V, RL=60Ω; Fig 1 | 3 |
| Differential output voltage (Dominant) | VOD(D) | 1.2 | 2 | 3 | V | VI=0V, RL=60Ω, RS=0V; Fig 3 | 3 |
| Output voltage (Recessive), CANH | VO(R) | 2.3 | V | VI=3V, RS=0V, RL=60Ω; Fig 1 | 3 | ||
| Output voltage (Recessive), CANL | VO(R) | 2.3 | V | 3 | |||
| Differential output voltage (Recessive) | VOD(R) | -0.12 | 0.012 | V | VI=3V, RS=0V | 3 | |
| Differential output voltage (Recessive), no load | VOD(R) | -0.5 | 0.05 | V | VI=3V, RS=0V, No load | 3 | |
| High-level input current | IIH | -30 | 30 | μA | VI=2V | 3 | |
| Low-level input current | IIL | -30 | 30 | μA | VI=0.8V | 3 | |
| Short-circuit output current, CANH | IOS | -250 | mA | CANH=-7V | 3 | ||
| Short-circuit output current, CANH | IOS | 1 | mA | CANH=12V | 3 | ||
| Short-circuit output current, CANL | IOS | -1 | mA | CANL=-7V | 3 | ||
| Short-circuit output current, CANL | IOS | 250 | mA | CANL=12V | 3 | ||
| Supply current (Standby) | ICC | 360 | 600 | μA | Standby | 3 | |
| Supply current (Dominant, no load) | ICC | 6 | mA | VI=0V (Dominant), No load | 3 | ||
| Supply current (Recessive, no load) | ICC | 6 | mA | VI=VCC (Recessive), No load | 3 | ||
| Propagation delay time (low-to-high-level) | tPLH | 35 | 85 | ns | R=0, Short circuit (Fig 4) | 3 | |
| Propagation delay time (low-to-high-level) | tPLH | 70 | 125 | ns | R=10kΩ | 3 | |
| Propagation delay time (low-to-high-level) | tPLH | 500 | 870 | ns | R=100kΩ | 3 | |
| Propagation delay time (high-to-low-level) | tPHL | 70 | 120 | ns | R=0, Short circuit (Fig 4) | 3 | |
| Propagation delay time (high-to-low-level) | tPHL | 130 | 180 | ns | R=10kΩ | 3 | |
| Propagation delay time (high-to-low-level) | tPHL | 870 | 1200 | ns | R=100kΩ | 3 | |
| Positive-going input threshold voltage | VIT+ | 750 | 900 | mV | Table 1 | 4 | |
| Negative-going input threshold voltage | VIT- | 500 | 650 | mV | Table 1 | 4 | |
| High-level output voltage | VOH | 2.4 | V | -6V<VID<00mV IO=-8mA (Fig 5) | 4 | ||
| Low-level output voltage | VOL | 0.4 | V | 900mV<VID<6V IO=8mA (Fig 5) | 4 | ||
| Bus input current | Ii | 100 | 600 | μA | VIH=12V, VCC=0V | 4 | |
| Bus input current | Ii | 100 | 500 | μA | VIH=12V, VCC=3.3V | 4 | |
| Bus input current | Ii | -450 | -20 | μA | VIH=-7V, VCC=0V | 4 | |
| Bus input current | Ii | -610 | -30 | μA | VIH=-7V, VCC=3.3V | 4 | |
| Bus input resistance | Ri | 20 | 35 | 50 | kΩ | Corresponding standards of ISO 11898-2 | 4 |
| Differential input resistance | Rdiff | 40 | 100 | kΩ | 4 | ||
| Bus input capacitance | Ci | 40 | pF | 4 | |||
| Differential input capacitance | Cdiff | 20 | pF | 4 | |||
| Propagation delay time (low-to-high-level), receiver | tPLH | 35 | 60 | ns | Fig 6 | 5 | |
| Propagation delay time (high-to-low-level), receiver | tPHL | 35 | 60 | ns | Fig 6 | 5 | |
| Pulse skew /tPHL - tPLH/ | tsk | 10 | ns | 5 | |||
| Output signal rise time | tr | 1.5 | ns | Fig 6 | 5 | ||
| Output signal fall time | tf | 1.5 | ns | Fig 6 | 5 | ||
| Thermal shutdown temperature | Tj(sd) | 155 | 165 | 180 | ℃ | 5 | |
| Loop delay 1, driver input to receiver output, recessive to dominant | t(LOOP1) | 70 | 135 | ns | R=0, short circuit, Fig 8 | 5 | |
| Loop delay 2, driver input to receiver output, dominant to recessive | t(LOOP2) | 70 | 165 | ns | R=0, short circuit, Fig 8 | 5 | |
| Loop back delay, driver input to receiver output (AB1) | t(AB1) | 10 | 20 | ns | Fig 9 | 5 | |
| Loop back delay, driver input to receiver output (AB2) | t(AB2) | 35 | 60 | ns | Fig 10 | 5 | |
| Power consumption in sleep mode | ICC | 360 | 600 | μA | RS=VCC, VI=VCC | 6 | |
| Dominant power consumption | 50 | 70 | mA | VI=0V, RS=0V, LOAD=60Ω | 6 | ||
| Recessive power consumption | 6 | mA | VI=VCC, RS=0V, No load | 6 | |||
| Wake-up time from standby mode | tWAKE | 0.55 | 1.5 | μs | RS adds square wave; Fig 7 | 6 | |
| Input current for high-speed | IRS | -450 | 0 | μA | VRS<1V | 6 | |
| Power-off leakage current | Ioff | -250 | 250 | μA | Vcc=0V, VCANH=VCANL=5V | 6 |
CAD (KiCad official)
- Symbol:
SIT65HVD235DR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
sit65hvd235dr-etched.step/sit65hvd235dr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sit65hvd235dr.step/sit65hvd235dr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: SIT datasheet (17 pp, sha256
00b63d9c68ca5f52, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).