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SIT65HVD08P

Public Made by Adom

by adom

SIT RS-485/RS-422 ICs, DIP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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SIT65HVD08P

SIT · RS-485/RS-422 ICs · DIP-8

SIT65HVD08P from SIT, in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RO output Receiver output that is high when A-B ≥ 200 mV and low when A-B ≤ -200 mV while enabled.
2 /RE input Receiver output enable: a low level enables RO and a high level places it in high impedance.
3 DE input Driver output enable: a high level enables driver outputs A and B and a low level places them in high impedance.
4 DI input Driver input: with the driver enabled, a logic low forces A low and B high, and a logic high forces A high and B low.
5 GND power_in Ground connection (0 V).
6 A bidirectional Non-inverting receiver input A and driver output A, with ±15V bus fault tolerance and ±16kV contact ESD protection.
7 B bidirectional Inverting receiver input B and driver output B, with ±15V bus fault tolerance and ±16kV contact ESD protection.
8 VCC power_in Power supply, 3V to 5.5V (absolute maximum +7 V).

Key specifications

Parameter Value
Manufacturer SIT
Package DIP-8
Category Interface ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage VCC 7 V 2
Control port voltage /RE, DE, DI -0.3 V upper limit printed as VCC+0.5 2
Driver Output Voltage A, B -15 15 V 2
Receiver Output Voltage RO -0.3 V upper limit printed as VCC+0.5 2
Temperature Range -40 85 ℃ 2
Storage Temperature Range -60 150 ℃ 2
Soldering Temperature (reflow) 300 ℃ 2
Continuous Power Dissipation DIP8 700 mW DIP8 2
Differential Driver Output (no load) VOD1 3 5.5 V 3
Differential Driver Output VOD2 2 V Fig 2, RL = 54 Ω, VCC=3.3V 3
Differential Driver Output VOD2 3.5 V Fig 2, RL = 54 Ω, VCC=5.0V 3
Change in Magnitude of Differential Output Voltage ∆VOD 0.2 V Fig 2, RL = 54 Ω 3
Driver Common-Mode Output Voltage VOC 3 V Fig 2, RL = 54 Ω 3
Change In Magnitude of Common-Mode Voltage ∆VOC 0.2 V Fig 2, RL = 54 Ω 3
Input High Voltage VIH 2 V DE, DI, /RE 3
Input Low Voltage VIL 0.8 V DE, DI, /RE 3
Input Current (RE, DI, /RE) IIN1 -2 2 uA DE, DI, /RE 3
Driver Short-Circuit Output Current (short to high) IOSD1 250 mA Short to 0V~12V 3
Driver Short-Circuit Output Current (short to low) IOSD2 -250 mA Short to -7V~0V 3
Thermal-Shutdown Threshold 140 ℃ 3
Thermal-Shutdown Hysteresis 20 ℃ 3
Input Current (A, B) IIN2 125 uA DE = 0 V, VCC=0 or 3.3/5V, VIN = 12 V 3
Input Current (A, B) IIN2 -100 uA DE = 0 V, VCC=0 or 3.3/5V, VIN = -7 V 3
Positive-going input threshold voltage VIT+ 200 mV -7V≦VCM≦12V 4
Negative-going input threshold voltage VIT- -200 mV -7V≦VCM≦12V 4
Receiver Input Hysteresis Vhys 30 mV -7V≦VCM≦12V; 10 also printed 4
RO Output-Low Voltage VOL 0.4 V IOUT = +4mA, VID = -200 mV 4
Three-State Output Current at Receiver IOZR -1 1 uA 0.4 V < VO < 2.4 V 4
Receiver Input Resistance RIN 96 kΩ -7V≦VCM≦12V 4
Receiver Output Short-Circuit IOSR 8 60 mA 0 V≤VO≤VCC 4
Supply Current ICC1 430 650 uA /RE=0V, DE=0V, VCC=3.3V 4
Supply Current ICC1 470 750 uA /RE=0V, DE=0V, VCC=5V 4
Supply Current ICC2 450 650 uA /RE=VCC, DE=VCC, VCC=3.3V 4
Supply Current ICC2 510 750 uA /RE=0V, DE=0V, VCC=5V 4
Supply Current in Shutdown Mode ISHDN 0.4 10 uA /RE=VCC, DE=0V, VCC=3.3V 4
Supply Current in Shutdown Mode ISHDN 0.1 10 uA /RE=VCC, DE=0V, VCC=5V 4
Driver Differential Output Delay tDD 12 32 ns RDIFF = 60 Ω, CL1=CL2=100pF (Fig 3,4) 5
Driver Differential Output Transition Time tTD 15 28 ns RDIFF = 60 Ω, CL1=CL2=100pF (Fig 3,4) 5
Driver Propagation Delay, Low-to-High Level tDZH 18 40 ns RDIFF = 27 Ω (Fig 3,4) 5
Driver Propagation Delay, High-to-Low Level tDZL 18 40 ns RDIFF = 27 Ω (Fig 3,4) 5
Driver Propagation-Delay Skew tPDS 2 2.5 ns RDIFF = 27 Ω (Fig 3,4) 5
Driver-Output Enable Time to High Level tPZH 55 ns RL = 110Ω (Fig 5,6) 5
Driver-Output Enable Time to Low Level tPZL 55 ns RL = 110Ω (Fig 5,6) 5
Driver-Output Disable Time from Low Level tPLZ 85 ns RL = 110Ω (Fig 5,6) 5
Driver-Output Disable Time from High Level tPHZ 85 ns RL = 110Ω (Fig 5,6) 5
Driver-Output Enable Time from Shutdown to Low Level tDSH 400 1000 ns RL = 110Ω (Fig 5,6) 5
Driver-Output Enable Time from Shutdown to High Level tDSL 400 1000 ns RL = 110Ω (Fig 5,6) 5
Receiver Propagation Delay (low to high) tRPLH 70 ns CL=15pF (Fig 7,8) 6
Receiver Propagation Delay (high to low) tRPHL 70 ns CL=15pF (Fig 7,8) 6
Receiver Propagation Delay Skew tRPDS 5 ns CL=15pF (Fig 7,8) 6
Receiver Enable to Output Low tRPZL 15 ns CL=15pF (Fig 7,8) 6
Receiver Enable to Output High tRPZH 15 ns CL=15pF (Fig 7,8) 6
Receiver Disable Time from Low tPRLZ 25 55 ns CL=15pF (Fig 7,8) 6
Receiver Disable Time from High tPRHZ 25 55 ns CL=15pF (Fig 7,8) 6
Receiver Enable from shutdown to Output High tRPSH 250 1500 ns CL=15pF (Fig 7,8) 6
Receiver Enable from Shutdown to Output Low tRPSL 250 1500 ns CL=15pF (Fig 7,8) 6
Time to Shutdown tSHDN 80 300 ns NOTE2 6

CAD (KiCad official)

  • Symbol: SIT65HVD08P
  • Footprint: Package_DIP:DIP-8_W7.62mm
  • 3D model: DIP-8 (KiCad packages3D, STEP)
  • 3D model files: sit65hvd08p-etched.step / sit65hvd08p-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sit65hvd08p.step / sit65hvd08p.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: SIT datasheet (14 pp, sha256 c6dca4fc6d9f01d7, retrieved 2026-10-22, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF