component
SIT3491EESD
Public Made by Adomby adom
SIT RS-485 / RS-422 ICs, SOP-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSIT3491EESD
SIT · RS-485 / RS-422 ICs · SOP-14
SIT3491EESD from SIT, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | No internal connection. Leave floating. |
| 2 | RO | output | Receiver output. When /RE is low: RO = H if A-B >= -10mV, RO = L if A-B <= -200mV. CMOS logic-level output referenced to VCC/GND. |
| 3 | /RE | input | Receiver output enable, active low. /RE = L enables the receiver (RO active); /RE = H puts RO in high-impedance. /RE = H together with DE = L puts the device into low-power shutdown. |
| 4 | DE | input | Driver output enable, active high. DE = H enables the driver (Y/Z active); DE = L puts Y/Z in high-impedance. /RE = H together with DE = L puts the device into low-power shutdown. |
| 5 | DI | input | Driver input. DI = L drives Y low and Z high; DI = H drives Y high and Z low. CMOS logic input; VIH >= 2.0V, VIL <= 0.8V. |
| 6 | GND | power_in | Ground return. Tie to system ground; both GND pins (6 and 7) must be connected. |
| 7 | GND | power_in | Ground return. Tie to system ground; both GND pins (6 and 7) must be connected. |
| 8 | NC | unconnected | No internal connection. Leave floating. |
| 9 | Y | output | Driver non-inverting (in-phase) differential output to the RS-485/RS-422 bus. High-impedance when DE = L. ±15kV HBM ESD protected. |
| 10 | Z | output | Driver inverting (anti-phase) differential output to the RS-485/RS-422 bus. High-impedance when DE = L. ±15kV HBM ESD protected. |
| 11 | B | input | Receiver inverting differential input from the RS-485/RS-422 bus. Common-mode range -7V to +12V; RIN(min) = 96 kΩ (1/8 unit load). ±15kV HBM ESD protected. |
| 12 | A | input | Receiver non-inverting differential input from the RS-485/RS-422 bus. Common-mode range -7V to +12V; RIN(min) = 96 kΩ (1/8 unit load). ±15kV HBM ESD protected. |
| 13 | VCC | power_in | Supply voltage pin. May be tied to VCC (3V ≤ VCC ≤ 5.5V) together with pin 14, or left unconnected. Bypass with a 0.1 μF ceramic capacitor to GND when connected. |
| 14 | VCC | power_in | Primary supply pin, 3V ≤ VCC ≤ 5.5V. Bypass with a 0.1 μF ceramic capacitor to GND. Absolute max VCC = +7V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | SIT |
| Package | SOP-14 |
| Category | Interface |
| Pins | 14 |
Ordering variants
Same part, different packaging or reel option.
SIT3491EESD
CAD (KiCad official)
- Symbol:
SIT3491EESD - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOP-14 (KiCad packages3D, STEP)
- 3D model files:
sit3491eesd-etched.step/sit3491eesd-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sit3491eesd.step/sit3491eesd.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: SIT datasheet (12 pp, sha256
c171fa9cb090a1ee, retrieved 2026-08-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).