component

SIT3490EEUA

Public Made by Adom

by adom

SIT RS-485 / RS-422 ICs, MSOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

Schematic Symbol

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PCB Footprint

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Datasheet

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Contents

README

markdown

SIT3490EEUA

SIT · RS-485 / RS-422 ICs · MSOP-8

SIT3490EEUA from SIT, in a MSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC power_in Positive supply input, 3.0 V to 5.5 V nominal (absolute max +7 V). Bypass locally with a 0.1 uF ceramic capacitor to GND.
2 RO output Receiver output (CMOS logic). RO is high when A-B >= +200 mV and low when A-B <= -200 mV. Drives VOH >= VCC-1.5 V at IOUT = -4 mA and VOL <= 0.4 V at IOUT = +4 mA.
3 DI input Driver input (CMOS logic, VIH >= 2.0 V, VIL <= 0.8 V). A low on DI forces output Y low and Z high; a high on DI forces Y high and Z low.
4 GND power_in Ground reference for supply and all signals.
5 Y output Non-inverting driver output. Connect to the RS-485/RS-422 differential bus. Driver has short-circuit current limiting (35 mA to 250 mA to 0-12 V and -35 mA to -250 mA to -7-0 V) and ±15 kV HBM ESD protection.
6 Z output Inverting driver output. Connect to the RS-485/RS-422 differential bus opposite polarity from Y. ±15 kV HBM ESD protected.
7 B input Inverting receiver input from the RS-485/RS-422 differential bus. 1/8 unit-load (RIN >= 96 kΩ); tolerates -7 V to +12 V common-mode. ±15 kV HBM ESD protected.
8 A input Non-inverting receiver input from the RS-485/RS-422 differential bus. 1/8 unit-load (RIN >= 96 kΩ); tolerates -7 V to +12 V common-mode. ±15 kV HBM ESD protected.

Key specifications

Parameter Value
Manufacturer SIT
Package MSOP-8
Category Interface
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • SIT3490EEUA
  • SIT3490EEUAEESA
  • SIT3490EEUAEEPA

CAD (KiCad official)

  • Symbol: SIT3490EEUA
  • Footprint: Package_SO:MSOP-8_3x3mm_P0.65mm
  • 3D model: MSOP-8 (KiCad packages3D, STEP)
  • 3D model files: sit3490eeua-etched.step / sit3490eeua-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sit3490eeua.step / sit3490eeua.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
sit3490eeua.step 123 KB You want the bare part, or you mark your own boards.
sit3490eeua-etched.step 2.3 MB You want the part with SIT3490EEUA already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 565 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: SIT datasheet (13 pp, sha256 4e2651818bcb1ad0, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF