# SIT3088EEUA

**SIT** · RS-485 / RS-422 ICs · MSOP-8

SIT3088EEUA from SIT, in a MSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RO | output | Receiver Output. When /RE is low and (A - B) >= -10 mV, RO is high; when (A - B) <= -200 mV, RO is low. High-impedance when /RE is high. |
| 2 | /RE | input | Receiver Output Enable (active low). Drive /RE low to enable RO; RO is high-impedance when /RE is high. Drive /RE high and DE low to enter low-power shutdown mode. |
| 3 | DE | input | Driver Output Enable (active high). Drive DE high to enable driver outputs A and B; outputs are high-impedance when DE is low. Drive /RE high and DE low to enter low-power shutdown mode. |
| 4 | DI | input | Driver Input. With DE high, a low on DI forces A low and B high; a high on DI forces A high and B low. |
| 5 | GND | power_in | Ground reference for the device. All voltages are referenced to this pin. |
| 6 | A | bidirectional | Non-inverting receiver input and non-inverting driver output (RS-485/RS-422 bus line A). Withstands -15V to +15V bus fault, 15kV HBM ESD protected. |
| 7 | B | bidirectional | Inverting receiver input and inverting driver output (RS-485/RS-422 bus line B). Withstands -15V to +15V bus fault, 15kV HBM ESD protected. |
| 8 | VCC | power_in | Positive supply, 3.0 V to 5.5 V operating range (6.5 V absolute max). Bypass locally to GND with a 0.1 µF ceramic capacitor. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | SIT |
| Package | MSOP-8 |
| Category | Interface |
| Pins | 8 |

## Ordering variants

Same part, different packaging or reel option.

- `SIT3088EEUA`
- `SIT3088EEUAEESA`
- `SIT3088EEUAEEPA`
- `SIT3088EEUAETK`

## CAD (KiCad official)

- Symbol: `SIT3088EEUA`
- Footprint: `Package_SO:MSOP-8_3x3mm_P0.65mm`
- 3D model: MSOP-8 (KiCad packages3D, STEP)
- 3D model files: `sit3088eeua-etched.step` / `sit3088eeua-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sit3088eeua.step` / `sit3088eeua.glb` are the bare package body.

## 3D model downloads

Two STEP files. Same geometry, different body top:

| File | Size | Use it when |
|---|---|---|
| [`sit3088eeua.step`](sit3088eeua.step) | 123 KB | You want the bare part, or you mark your own boards. |
| [`sit3088eeua-etched.step`](sit3088eeua-etched.step) | 2.6 MB | You want the part with `SIT3088EEUA` already on it. |

The marking in the etched file is real recessed geometry cut into the solid, not a
texture or a decal: 617 faces against 147 in the bare model. It
survives export, section views, and rendering in any CAD tool, and it drops straight
into KiCad or Fusion with no extra setup.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [SIT datasheet](docs/sit3088eeua-datasheet.pdf) (19 pp, sha256 `7b3ff7bae541908c`, retrieved 2026-08-17, tier: lcsc)
- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/sit3088eeua-datasheet.pdf)