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SiLM5720CA-DG

Public Made by Adom

by adom

Sillumin Digital Isolators, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SiLM5720CA-DG

Sillumin · Digital Isolators · SOP-8

SiLM5720CA-DG from Sillumin, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC1 power_in Input-side power supply, which must be within 2.25 V to 5.5 V and should be bypassed with a 0.1 μF capacitor placed as close to the pin as possible.
2 INA input Channel A input; the input high threshold is 0.7 VCCI (min) and the low threshold is 0.3 VCCI (max), and an open input drives OUTA to its default level (high for SiLM5720, low for the F suffix).
3 INB input Channel B input; the input high threshold is 0.7 VCCI (min) and the low threshold is 0.3 VCCI (max), and an open input drives OUTB to its default level (high for SiLM5720, low for the F suffix).
4 GND1 power_in Input-side power ground, which is the reference for VCC1 and the input-side voltage ratings.
5 GND2 power_in Output-side power ground, which is the reference for VCC2 and the output-side voltage ratings.
6 OUTB output Channel B output; the datasheet specifies IOH of -4 mA at 5 V, -2 mA at 3.3 V and -1 mA at 2.5 V, and IOL of 4 mA at 5 V, 2 mA at 3.3 V and 1 mA at 2.5 V.
7 OUTA output Channel A output; the datasheet specifies IOH of -4 mA at 5 V, -2 mA at 3.3 V and -1 mA at 2.5 V, and IOL of 4 mA at 5 V, 2 mA at 3.3 V and 1 mA at 2.5 V.
8 VCC2 power_in Output-side power supply, which must be within 2.25 V to 5.5 V and should be bypassed with a 0.1 μF capacitor placed as close to the pin as possible.

Key specifications

Parameter Value
Manufacturer Sillumin
Package SOP-8
Category Signal Isolation Devices
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC1, VCC2 2.25 5.5 V 7
High level input voltage VIH 0.7 1 VCCI VCCI = input side VCC; max printed as VCCI 7
Low level input voltage VIL 0 0.3 VCCI 7
Data rate DR 0 100 Mbps 7
Junction temperature TJ -40 150 °C 7
Ambient temperature TA -40 125 °C 7
Supply voltage VCC1, VCC2 VCC1, VCC2 -0.3 6 V 7
Voltage at Inx, referenced to input side ground VI -0.3 V max printed as VCC+0.3 V 7
Voltage at OUTx, referenced to output side ground VOUT -0.3 V max printed as VCC+0.3 V 7
Output current IO -15 15 mA 7
Junction temperature TJ -55 150 °C 7
Storage temperature TS -65 150 °C 7
Under voltage lockout, VCCx rising UVLOR 2.05 2.25 V VCCx rising; VCC1 = VCC2 = 5V ±10% 12
Under voltage lockout, VCCx falling UVLOF 1.7 1.9 V VCCx falling; VCC1 = VCC2 = 5V ±10% 12
Current on VCC1 with DC signal ICC1_QH 0.4 0.6 mA VI = VCCI (SiLM5720) 12
Current on VCC1 with DC signal ICC1_QL 2.8 4.1 mA VI = 0 V (SiLM5720) 12
Current on VCC2 with DC signal ICC2_QH 1.4 2 mA VI = VCCI (SiLM5720) 12
Current on VCC2 with DC signal ICC2_QL 1.5 2.2 mA VI = 0 V (SiLM5720) 12
Rising input threshold voltage VIH 0.6 0.7 VCCI VCC1 = VCC2 = 5V ±10% 13
Falling input threshold voltage VIL 0.3 0.4 VCCI VCC1 = VCC2 = 5V ±10% 13
High level output voltage VOH 4.8 V IOH = -4mA; min printed as VCCO-0.4 V 13
Low level output voltage VOL 0.12 0.3 V IOL = 4mA 13
Output high level common mode transient immunity CMTIH 150 200 kV/us VI = VCCI, VCM=1200V, CL=15pF 13
Output low level common mode transient immunity CMTIL 150 200 kV/us VI = 0V, VCM=1200V, CL=15pF 13
Propagation delay, low to high tPLH 12 20 ns CL=15pF 13
Propagation delay, high to low tPHL 12 20 ns CL=15pF 13
Under voltage lockout, VCCx rising UVLOR 2.05 2.25 V VCCx rising; VCC1 = VCC2 = 3.3V ±10% 15
Under voltage lockout, VCCx falling UVLOF 1.7 1.9 V VCCx falling; VCC1 = VCC2 = 3.3V ±10% 15
Current on VCC1 with DC signal ICC1_QH 0.4 0.6 mA VI = VCCI (SiLM5720) 15
Current on VCC1 with DC signal ICC1_QL 2.8 4 mA VI = 0 V (SiLM5720) 15
Current on VCC2 with DC signal ICC2_QH 1.3 2 mA VI = VCCI (SiLM5720) 15
Current on VCC2 with DC signal ICC2_QL 1.5 2.1 mA VI = 0 V (SiLM5720) 15
Rising input threshold voltage VIH 0.6 0.7 VCCI VCC1 = VCC2 = 3.3V ±10% 16
Falling input threshold voltage VIL 0.3 0.4 VCCI VCC1 = VCC2 = 3.3V ±10% 16
High level output voltage VOH 3.2 V IOH = -2mA; min printed as VCCO-0.3 V 16
Low level output voltage VOL 0.07 0.2 V IOL = 2mA 16
Output high level common mode transient immunity CMTIH 150 200 kV/us VI = VCCI, VCM=1200V, CL=15pF 16
Output low level common mode transient immunity CMTIL 150 200 kV/us VI = 0V, VCM=1200V, CL=15pF 16
Propagation delay, low to high tPLH 12 25 ns CL=15pF 16
Propagation delay, high to low tPHL 12 25 ns CL=15pF 16
Under voltage lockout, VCCx rising UVLOR 2.05 2.25 V VCCx rising; VCC1 = VCC2 = 2.5V ±10% 18
Under voltage lockout, VCCx falling UVLOF 1.7 1.9 V VCCx falling; VCC1 = VCC2 = 2.5V ±10% 18
Current on VCC1 with DC signal ICC1_QH 0.4 0.6 mA VI = VCCI (SiLM5720) 18
Current on VCC1 with DC signal ICC1_QL 2.8 3.9 mA VI = 0 V (SiLM5720) 18
Current on VCC2 with DC signal ICC2_QH 1.3 1.9 mA VI = VCCI (SiLM5720) 18
Current on VCC2 with DC signal ICC2_QL 1.5 2.1 mA VI = 0 V (SiLM5720) 18
Rising input threshold voltage VIH 0.6 0.7 VCCI VCC1 = VCC2 = 2.5V ±10% 19
Falling input threshold voltage VIL 0.3 0.4 VCCI VCC1 = VCC2 = 2.5V ±10% 19
High level output voltage VOH 2.45 V IOH = -1mA; min printed as VCCO-0.2 V 19
Low level output voltage VOL 0.04 0.1 V IOL = 1mA 19
Output high level common mode transient immunity CMTIH 150 200 kV/us VI = VCCI, VCM=1200V, CL=15pF 19
Output low level common mode transient immunity CMTIL 150 200 kV/us VI = 0V, VCM=1200V, CL=15pF 19
Propagation delay, low to high tPLH 14 27 ns CL=15pF 19
Propagation delay, high to low tPHL 14 27 ns CL=15pF 19
Junction to ambient thermal resistance RθJA 135.3 °C/W SOP8 package 7
Junction to case (top) thermal resistance RθJC 48 °C/W SOP8 package 7

CAD (KiCad official)

  • Symbol: SiLM5720CA-DG
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: silm5720ca-dg-etched.step / silm5720ca-dg-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); silm5720ca-dg.step / silm5720ca-dg.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Sillumin datasheet (24 pp, sha256 8237ec301a17aebc, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF