SII9293CNUC

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  <gates>
    <gate name="G$1" symbol="SII9293CNUC" x="0" y="0"/>
  </gates>
  <devices>
    <device name="" package="QFN-72-1EP_10x10mm_P0.5mm_EP6x6mm">
      <connects>
        <connect gate="G$1" pin="VDDH" pad="1"/>
        <connect gate="G$1" pin="RXCN" pad="2"/>
        <connect gate="G$1" pin="RXCP" pad="3"/>
        <connect gate="G$1" pin="RX0N" pad="4"/>
        <connect gate="G$1" pin="RX0P" pad="5"/>
        <connect gate="G$1" pin="RX1N" pad="6"/>
        <connect gate="G$1" pin="RX1P" pad="7"/>
        <connect gate="G$1" pin="RX2N" pad="8"/>
        <connect gate="G$1" pin="RX2P" pad="9"/>
        <connect gate="G$1" pin="VDD" pad="10"/>
        <connect gate="G$1" pin="GPIO0_CI2CA" pad="11"/>
        <connect gate="G$1" pin="GPIO1" pad="12"/>
        <connect gate="G$1" pin="CSDA" pad="13"/>
        <connect gate="G$1" pin="CSCL" pad="14"/>
        <connect gate="G$1" pin="INT" pad="15"/>
        <connect gate="G$1" pin="TMODE" pad="16"/>
        <connect gate="G$1" pin="VCC33_OUT" pad="17"/>
        <connect gate="G$1" pin="RESET_N" pad="18"/>
        <connect gate="G$1" pin="DSDA" pad="19"/>
        <connect gate="G$1" pin="DSCL" pad="20"/>
        <connect gate="G$1" pin="CBUS_HPD" pad="21"/>
        <connect gate="G$1" pin="RPWR5V" pad="22"/>
        <connect gate="G$1" pin="SBVCC5V" pad="23"/>
        <connect gate="G$1" pin="MHL_CD" pad="24"/>
        <connect gate="G$1" pin="CBUS_OE" pad="25"/>
        <connect gate="G$1" pin="CEC_A" pad="26"/>
        <connect gate="G$1" pin="VDD@2" pad="27"/>
        <connect gate="G$1" pin="GNDIO" pad="28"/>
        <connect gate="G$1" pin="VDDIO" pad="29"/>
        <connect gate="G$1" pin="SD0_SPDIF" pad="30"/>
        <connect gate="G$1" pin="WS" pad="31"/>
        <connect gate="G$1" pin="SCK" pad="32"/>
        <connect gate="G$1" pin="MCLK" pad="33"/>
        <connect gate="G$1" pin="VSYNC" pad="34"/>
        <connect gate="G$1" pin="DE" pad="35"/>
        <connect gate="G$1" pin="HSYNC" pad="36"/>
        <connect gate="G$1" pin="Q0" pad="37"/>
        <connect gate="G$1" pin="EP" pad="73"/>
        <connect gate="G$1" pin="AVDD" pad="72"/>
        <connect gate="G$1" pin="APLLVDD" pad="71"/>
        <connect gate="G$1" pin="XTALVCC33" pad="70"/>
        <connect gate="G$1" pin="XTALGND" pad="69"/>
        <connect gate="G$1" pin="XTALOUT" pad="68"/>
        <connect gate="G$1" pin="XTALIN" pad="67"/>
        <connect gate="G$1" pin="Q23" pad="66"/>
        <connect gate="G$1" pin="Q22" pad="65"/>
        <connect gate="G$1" pin="Q21" pad="64"/>
        <connect gate="G$1" pin="Q20" pad="63"/>
        <connect gate="G$1" pin="VDDIO@2" pad="62"/>
        <connect gate="G$1" pin="GNDIO@2" pad="61"/>
        <connect gate="G$1" pin="Q19" pad="60"/>
        <connect gate="G$1" pin="Q18" pad="59"/>
        <connect gate="G$1" pin="Q17" pad="58"/>
        <connect gate="G$1" pin="Q16" pad="57"/>
        <connect gate="G$1" pin="VDD@3" pad="56"/>
        <connect gate="G$1" pin="Q15" pad="55"/>
        <connect gate="G$1" pin="Q14" pad="54"/>
        <connect gate="G$1" pin="Q13" pad="53"/>
        <connect gate="G$1" pin="Q12" pad="52"/>
        <connect gate="G$1" pin="Q11" pad="51"/>
        <connect gate="G$1" pin="Q10" pad="50"/>
        <connect gate="G$1" pin="Q9" pad="49"/>
        <connect gate="G$1" pin="Q8" pad="48"/>
        <connect gate="G$1" pin="VDDIO@3" pad="47"/>
        <connect gate="G$1" pin="ODCK" pad="46"/>
        <connect gate="G$1" pin="GNDIO@3" pad="45"/>
        <connect gate="G$1" pin="Q7" pad="44"/>
        <connect gate="G$1" pin="Q6" pad="43"/>
        <connect gate="G$1" pin="Q5" pad="42"/>
        <connect gate="G$1" pin="Q4" pad="41"/>
        <connect gate="G$1" pin="Q3" pad="40"/>
        <connect gate="G$1" pin="Q2" pad="39"/>
        <connect gate="G$1" pin="Q1" pad="38"/>
      </connects>
      <technologies><technology name=""/></technologies>
    </device>
  </devices>
</deviceset>
</devicesets>
</library>
</drawing>
</eagle>