SII9293CNUC

{
  "slug": "sii9293cnuc",
  "version": "0.1.0",
  "type": "component",
  "description": "Lattice Video Interface ICs, QFN-72-EP(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "interface ics",
    "sii9293cnuc",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "sii9293cnuc.kicad_sym",
    "sii9293cnuc.kicad_mod",
    "sii9293cnuc.glb",
    "sii9293cnuc.step",
    "sii9293cnuc.lbr",
    "docs/hero.png",
    "docs/sii9293cnuc-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "sii9293cnuc-hero.glb",
    "sii9293cnuc-hero.overlay.json",
    "sii9293cnuc-etched.glb"
  ],
  "component": {
    "mpn": "SII9293CNUC",
    "manufacturer": "Lattice",
    "package": "QFN-72-EP(10x10)",
    "pin_count": 73,
    "category": "Interface ICs",
    "subcategory": "Video Interface ICs",
    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/bd2667643becfda4c113f7c6d97fb239.pdf",
    "parts": {
      "symbol": "sii9293cnuc.kicad_sym",
      "footprint": "sii9293cnuc.kicad_mod",
      "model_3d": "sii9293cnuc-hero.glb",
      "model_3d_plain": "sii9293cnuc-etched.glb",
      "model_3d_step": "sii9293cnuc-etched.step",
      "model_3d_step_plain": "sii9293cnuc.step",
      "lbr": "sii9293cnuc.lbr"
    },
    "distributor_links": {
      "lcsc": "C369568"
    },
    "distributor_check": {
      "checked_at": "2026-10-26T19:14:11Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VDDH",
        "type": "power_in",
        "description": "Receiver termination 3.3 V analog supply input (3.14-3.46 V), connect to an external 3.3 V regulator or VCC33_OUT."
      },
      {
        "number": "2",
        "name": "RXCN",
        "type": "input",
        "description": "TMDS HDMI clock pair negative input."
      },
      {
        "number": "3",
        "name": "RXCP",
        "type": "input",
        "description": "TMDS HDMI clock pair positive input."
      },
      {
        "number": "4",
        "name": "RX0N",
        "type": "input",
        "description": "TMDS HDMI Channel 0 negative input or MHL input port data pair; other HDMI channels and clock are unused in MHL mode."
      },
      {
        "number": "5",
        "name": "RX0P",
        "type": "input",
        "description": "TMDS HDMI Channel 0 positive input or MHL input port data pair; other HDMI channels and clock are unused in MHL mode."
      },
      {
        "number": "6",
        "name": "RX1N",
        "type": "input",
        "description": "TMDS HDMI Channel 1 negative input."
      },
      {
        "number": "7",
        "name": "RX1P",
        "type": "input",
        "description": "TMDS HDMI Channel 1 positive input."
      },
      {
        "number": "8",
        "name": "RX2N",
        "type": "input",
        "description": "TMDS HDMI Channel 2 negative input."
      },
      {
        "number": "9",
        "name": "RX2P",
        "type": "input",
        "description": "TMDS HDMI Channel 2 positive input."
      },
      {
        "number": "10",
        "name": "VDD",
        "type": "power_in",
        "description": "Digital power, 1.0 V (0.95-1.05 V)."
      },
      {
        "number": "11",
        "name": "GPIO0_CI2CA",
        "type": "bidirectional",
        "description": "General purpose I/O 0 or CI2CA; defaults to input and is sampled once at reset to select the local I2C address range, LVTTL Schmitt, 5 V tolerant."
      },
      {
        "number": "12",
        "name": "GPIO1",
        "type": "bidirectional",
        "description": "General purpose I/O 1, LVTTL Schmitt, 5 V tolerant."
      },
      {
        "number": "13",
        "name": "CSDA",
        "type": "bidirectional",
        "description": "Local I2C data, true open drain, 5 V tolerant, requires external pull-up to 3.3 V."
      },
      {
        "number": "14",
        "name": "CSCL",
        "type": "input",
        "description": "Local I2C clock, true open drain, 5 V tolerant, requires external pull-up resistor to 3.3 V."
      },
      {
        "number": "15",
        "name": "INT",
        "type": "output",
        "description": "Active-low open-drain interrupt output to host controller, 5 V tolerant, requires external pull-up resistor."
      },
      {
        "number": "16",
        "name": "TMODE",
        "type": "output",
        "description": "Test mode enable, open drain, 5 V tolerant; pull down for normal operation."
      },
      {
        "number": "17",
        "name": "VCC33_OUT",
        "type": "power_out",
        "description": "Internal 3.3 V regulator output, requires 10 µF capacitor to ground, maximum output current 30 mA."
      },
      {
        "number": "18",
        "name": "RESET_N",
        "type": "input",
        "description": "Active-low external reset, Schmitt, 5 V tolerant, internal pull-up; can be left open when not required."
      },
      {
        "number": "19",
        "name": "DSDA",
        "type": "bidirectional",
        "description": "DDC I2C data, open drain, 5 V tolerant, carries HDCP KSV, An and Ri; drives low when only SBVCC5V or RPWR5V is present; DDC master for EDID EEPROM in MHL mode."
      },
      {
        "number": "20",
        "name": "DSCL",
        "type": "bidirectional",
        "description": "DDC I2C clock, open drain, 5 V tolerant, carries HDCP exchange; drives low when only SBVCC5V or RPWR5V is present; DDC master for EDID EEPROM in MHL mode."
      },
      {
        "number": "21",
        "name": "CBUS_HPD",
        "type": "bidirectional",
        "description": "MHL mode: CBUS control signal at 1.8 V level; HDMI mode: HPD output; 5 V tolerant."
      },
      {
        "number": "22",
        "name": "RPWR5V",
        "type": "power_in",
        "description": "5 V port detection input (4.3-5.5 V) from HDMI +5 V or MHL VBUS; needs 10 Ω series resistor, 5.1 kΩ pull-down and at least 1 µF to ground."
      },
      {
        "number": "23",
        "name": "SBVCC5V",
        "type": "power_in",
        "description": "Local 5 V power input (4.3-5.5 V), required if no RPWR5V input; needs 10 Ω series resistor."
      },
      {
        "number": "24",
        "name": "MHL_CD",
        "type": "input",
        "description": "MHL cable detect input, LVTTL Schmitt, 5 V tolerant."
      },
      {
        "number": "25",
        "name": "CBUS_OE",
        "type": "output",
        "description": "LVTTL output enable for CBUS output."
      },
      {
        "number": "26",
        "name": "CEC_A",
        "type": "bidirectional",
        "description": "HDMI-compliant CEC I/O, 5 V tolerant, with internal pull-up resistor, connects to the CEC signal of all HDMI connectors."
      },
      {
        "number": "27",
        "name": "VDD",
        "type": "power_in",
        "description": "Digital power, 1.0 V (0.95-1.05 V)."
      },
      {
        "number": "28",
        "name": "GNDIO",
        "type": "power_in",
        "description": "Digital I/O ground."
      },
      {
        "number": "29",
        "name": "VDDIO",
        "type": "power_in",
        "description": "Digital I/O power, 3.3 V (3.14-3.46 V)."
      },
      {
        "number": "30",
        "name": "SD0_SPDIF",
        "type": "output",
        "description": "LVTTL I2S/TDM serial data or S/PDIF audio output."
      },
      {
        "number": "31",
        "name": "WS",
        "type": "output",
        "description": "LVTTL I2S word select or TDM frame start (FS) signal."
      },
      {
        "number": "32",
        "name": "SCK",
        "type": "output",
        "description": "LVTTL I2S or TDM serial clock."
      },
      {
        "number": "33",
        "name": "MCLK",
        "type": "output",
        "description": "LVTTL audio output master clock."
      },
      {
        "number": "34",
        "name": "VSYNC",
        "type": "output",
        "description": "LVTTL vertical sync output."
      },
      {
        "number": "35",
        "name": "DE",
        "type": "output",
        "description": "LVTTL data enable output."
      },
      {
        "number": "36",
        "name": "HSYNC",
        "type": "output",
        "description": "LVTTL horizontal sync output."
      },
      {
        "number": "37",
        "name": "Q0",
        "type": "output",
        "description": "24-bit output pixel data bus bit 0, LVTTL, configurable format, can be put in high impedance."
      },
      {
        "number": "38",
        "name": "Q1",
        "type": "output",
        "description": "24-bit output pixel data bus bit 1, LVTTL, configurable format, can be put in high impedance."
      },
      {
        "number": "39",
        "name": "Q2",
        "type": "output",
        "description": "24-bit output pixel data bus bit 2, LVTTL, configurable format, can be put in high impedance."
      },
      {
        "number": "40",
        "name": "Q3",
        "type": "output",
        "description": "24-bit output pixel data bus bit 3, LVTTL, configurable format, can be put in high impedance."
      },
      {
        "number": "41",
        "name": "Q4",
        "type": "output",
        "description": "24-bit output pixel data bus bit 4, LVTTL, configurable format, can be put in high impedance."
      },
      {
        "number": "42",
        "name": "Q5",
        "type": "output",
        "description": "24-bit output pixel data bus bit 5, LVTTL, configurable format, can be put in high impedance."
      },
      {
        "number": "43",
        "name": "Q6",
        "type": "output",
        "description": "24-bit output pixel data bus bit 6, LVTTL, configurable format, can be put in high impedance."
      },
      {
        "number": "44",
        "name": "Q7",
        "type": "output",
        "description": "24-bit output pixel data bus bit 7, LVTTL, configurable format, can be put in high impedance."
      },
      {
        "number": "45",
        "name": "GNDIO",
        "type": "power_in",
        "description": "Digital I/O ground."
      },
      {
        "number": "46",
        "name": "ODCK",
        "type": "output",
        "description": "LVTTL output data clock."
      },
      {
        "number": "47",
        "name": "VDDIO",
        "type": "power_in",
        "description": "Digital I/O power, 3.3 V (3.14-3.46 V)."
      },
      {
        "number": "48",
        "name": "Q8",
        "type": "output",
        "description": "24-bit output pixel data bus bit 8, LVTTL, configurable format, can be put in high impedance."
      },
      {
        "number": "49",
        "name": "Q9",
        "type": "output",
        "description": "24-bit output pixel data bus bit 9, LVTTL, configurable format, can be put in high impedance."
      },
      {
        "number": "50",
        "name": "Q10",
        "type": "output",
        "description": "24-bit output pixel data bus bit 10, LVTTL, configurable format, can be put in high impedance."
      },
      {
        "number": "51",
        "name": "Q11",
        "type": "output",
        "description": "24-bit output pixel data bus bit 11, LVTTL, configurable format, can be put in high impedance."
      },
      {
        "number": "52",
        "name": "Q12",
        "type": "output",
        "description": "24-bit output pixel data bus bit 12, LVTTL, configurable format, can be put in high impedance."
      },
      {
        "number": "53",
        "name": "Q13",
        "type": "output",
        "description": "24-bit output pixel data bus bit 13, LVTTL, configurable format, can be put in high impedance."
      },
      {
        "number": "54",
        "name": "Q14",
        "type": "output",
        "description": "24-bit output pixel data bus bit 14, LVTTL, configurable format, can be put in high impedance."
      },
      {
        "number": "55",
        "name": "Q15",
        "type": "output",
        "description": "24-bit output pixel data bus bit 15, LVTTL, configurable format, can be put in high impedance."
      },
      {
        "number": "56",
        "name": "VDD",
        "type": "power_in",
        "description": "Digital power, 1.0 V (0.95-1.05 V)."
      },
      {
        "number": "57",
        "name": "Q16",
        "type": "output",
        "description": "24-bit output pixel data bus bit 16, LVTTL, configurable format, can be put in high impedance."
      },
      {
        "number": "58",
        "name": "Q17",
        "type": "output",
        "description": "24-bit output pixel data bus bit 17, LVTTL, configurable format, can be put in high impedance."
      },
      {
        "number": "59",
        "name": "Q18",
        "type": "output",
        "description": "24-bit output pixel data bus bit 18, LVTTL, configurable format, can be put in high impedance."
      },
      {
        "number": "60",
        "name": "Q19",
        "type": "output",
        "description": "24-bit output pixel data bus bit 19, LVTTL, configurable format, can be put in high impedance."
      },
      {
        "number": "61",
        "name": "GNDIO",
        "type": "power_in",
        "description": "Digital I/O ground."
      },
      {
        "number": "62",
        "name": "VDDIO",
        "type": "power_in",
        "description": "Digital I/O power, 3.3 V (3.14-3.46 V)."
      },
      {
        "number": "63",
        "name": "Q20",
        "type": "output",
        "description": "24-bit output pixel data bus bit 20, LVTTL, configurable format, can be put in high impedance."
      },
      {
        "number": "64",
        "name": "Q21",
        "type": "output",
        "description": "24-bit output pixel data bus bit 21, LVTTL, configurable format, can be put in high impedance."
      },
      {
        "number": "65",
        "name": "Q22",
        "type": "output",
        "description": "24-bit output pixel data bus bit 22, LVTTL, configurable format, can be put in high impedance."
      },
      {
        "number": "66",
        "name": "Q23",
        "type": "output",
        "description": "24-bit output pixel data bus bit 23, LVTTL, configurable format, can be put in high impedance."
      },
      {
        "number": "67",
        "name": "XTALIN",
        "type": "input",
        "description": "Crystal clock input, LVTTL, 5 V tolerant; can be driven by a clock (XTALOUT unconnected) or connected through a crystal to XTALOUT."
      },
      {
        "number": "68",
        "name": "XTALOUT",
        "type": "output",
        "description": "LVTTL crystal clock output."
      },
      {
        "number": "69",
        "name": "XTALGND",
        "type": "power_in",
        "description": "Crystal ground."
      },
      {
        "number": "70",
        "name": "XTALVCC33",
        "type": "power_in",
        "description": "Crystal power, 3.3 V (3.14-3.46 V)."
      },
      {
        "number": "71",
        "name": "APLLVDD",
        "type": "power_in",
        "description": "Analog PLL power, 1.0 V (0.95-1.05 V)."
      },
      {
        "number": "72",
        "name": "AVDD",
        "type": "power_in",
        "description": "Analog core VDD, 1.0 V (0.95-1.05 V)."
      },
      {
        "number": "73",
        "name": "EP",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-sonnet-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The datasheet gives no pin number for the exposed pad. I labeled it 'EP'. It is the only ground conn; The datasheet lists TMODE as an open-drain output, although it works as a test-mode enable that is p; Pin numbers come from the Pin Descriptions tables. The Figure 2 pin map text is garbled and could no"
        ],
        "pages_sent": 34,
        "cost_usd": 0.3438,
        "at": "2026-10-26T19:13:33"
      },
      "datasheet": {
        "url": "https://datasheet.lcsc.com/datasheet/pdf/bd2667643becfda4c113f7c6d97fb239.pdf",
        "pages": 58,
        "sha256": "d4da12913a0624e6",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 73,
        "described": 73,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "sii9293cnuc.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          10.02,
          10.02,
          0.9
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "7098383b52ae232c97eba12d94d48740d625feed84640fe6fff3cf9d1d976795",
        "checked": "2026-10-26",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "sii9293cnuc-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          10.02,
          10.02,
          0.9
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "0afbe1c508c8371de03109087d090572609b4243d2672ae55fe40c6f882a8acd",
        "checked": "2026-10-26",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}