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SI9948AEY
Public Made by Adomby adom
UMW MOSFETs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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si9948aey: specified limits as data (metadata.characteristics, 27 rows from the datasheet)
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SI9948AEY
UMW · MOSFETs · SOP-8
SI9948AEY from UMW, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source of channel 1 (P-channel MOSFET); the device limits are VDS = -60 V and continuous ID = -5.3 A at TC = 25 °C. |
| 2 | G1 | input | Gate of channel 1; the datasheet limits VGS to ±20 V. |
| 3 | S2 | passive | Source of channel 2 (P-channel MOSFET); the device limits are VDS = -60 V and continuous ID = -5.3 A at TC = 25 °C. |
| 4 | G2 | input | Gate of channel 2; the datasheet limits VGS to ±20 V. |
| 5 | D2 | passive | Drain of channel 2 (P-channel MOSFET); the device limit is VDS = -60 V. |
| 6 | D2 | passive | Drain of channel 2 (P-channel MOSFET); the device limit is VDS = -60 V. |
| 7 | D1 | passive | Drain of channel 1 (P-channel MOSFET); the device limit is VDS = -60 V. |
| 8 | D1 | passive | Drain of channel 1 (P-channel MOSFET); the device limit is VDS = -60 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | UMW |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDS | -60 | V | 2 | |||
| Gate-Source Voltage | VGS | -20 | 20 | V | 2 | ||
| Continuous Drain Current | ID | -5.3 | A | TC=25°C | 2 | ||
| Continuous Drain Current | ID | -5 | A | TC=70°C | 2 | ||
| Pulsed Drain Current | IDM | -32 | A | 2 | |||
| Continuous Source-Drain Diode Current | IS | -4.1 | A | TC=25°C | 2 | ||
| Continuous Source-Drain Diode Current | IS | -2 | A | TA=25°C | 2 | ||
| Avalanche Current | IAS | -20 | A | 2 | |||
| Single-Pulse Avalanche Energy | EAS | 20 | mJ | L = 0.1 mH | 2 | ||
| Maximum Power Dissipation | PD | 4 | W | TC=25°C | 2 | ||
| Maximum Power Dissipation | PD | 2.5 | W | TC=70°C | 2 | ||
| Maximum Power Dissipation | PD | 2 | W | TA=25°C | 2 | ||
| Maximum Power Dissipation | PD | 1.4 | W | TA=70°C | 2 | ||
| Operating Junction and Storage Temperature Range | TJ,TSTG | -55 | 150 | °C | 2 | ||
| Maximum Junction-to-Ambient (t ≤ 10s) | RthJA | 38 | 50 | °C/W | t ≤10s | 1 | |
| Maximum Junction-to-Ambient (steady state) | RthJA | 85 | °C/W | Steady-state, per note c | 1 | ||
| Maximum Junction-to-Foot | RthJF | 20 | 25 | °C/W | 1 | ||
| Drain-Source Breakdown Voltage | VDS | -60 | V | VDS=0V, ID=-250μA | 3 | ||
| Gate-Source Threshold Voltage | VGS(th) | -1 | -3 | V | VDS=VGS, ID=-250μA | 3 | |
| Gate-Source Leakage | IGSS | -100 | 100 | nA | VDS=0V, VGS=±20V | 3 | |
| Zero Gate Voltage Drain Current | IDSS | -1 | µA | VDS=-30V, VGS=0V | 3 | ||
| Zero Gate Voltage Drain Current | IDSS | -5 | µA | VDS=-30V, VGS=0V, TJ=55°C | 3 | ||
| On-State Drain Current | ID(ON) | -30 | A | VDS≥-10V, VGS=-10V | 3 | ||
| Drain-Source On-State Resistance | RDS(ON) | 54 | mΩ | VGS=-10V, ID=-5A | 3 | ||
| Drain-Source On-State Resistance | RDS(ON) | 59 | mΩ | VGS=-4.5V, ID=-4.5A | 3 | ||
| Body Diode Voltage | VSD | -0.75 | -1.2 | V | IS=-2A, VGS=0V | 4 | |
| Pulse Diode Forward Current | ISM | -32 | A | 4 |
CAD (KiCad official)
- Symbol:
SI9948AEY - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
si9948aey-etched.step/si9948aey-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);si9948aey.step/si9948aey.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: UMW datasheet (11 pp, sha256
aaa20b599cbf2f90, retrieved 2026-10-09, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SI9948AEY
**UMW** · MOSFETs · SOP-8
SI9948AEY from UMW, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source of channel 1 (P-channel MOSFET); the device limits are VDS = -60 V and continuous ID = -5.3 A at TC = 25 °C. |
| 2 | G1 | input | Gate of channel 1; the datasheet limits VGS to ±20 V. |
| 3 | S2 | passive | Source of channel 2 (P-channel MOSFET); the device limits are VDS = -60 V and continuous ID = -5.3 A at TC = 25 °C. |
| 4 | G2 | input | Gate of channel 2; the datasheet limits VGS to ±20 V. |
| 5 | D2 | passive | Drain of channel 2 (P-channel MOSFET); the device limit is VDS = -60 V. |
| 6 | D2 | passive | Drain of channel 2 (P-channel MOSFET); the device limit is VDS = -60 V. |
| 7 | D1 | passive | Drain of channel 1 (P-channel MOSFET); the device limit is VDS = -60 V. |
| 8 | D1 | passive | Drain of channel 1 (P-channel MOSFET); the device limit is VDS = -60 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | UMW |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDS | | | -60 | V | | 2 |
| Gate-Source Voltage | VGS | -20 | | 20 | V | | 2 |
| Continuous Drain Current | ID | | | -5.3 | A | TC=25°C | 2 |
| Continuous Drain Current | ID | | | -5 | A | TC=70°C | 2 |
| Pulsed Drain Current | IDM | | | -32 | A | | 2 |
| Continuous Source-Drain Diode Current | IS | | | -4.1 | A | TC=25°C | 2 |
| Continuous Source-Drain Diode Current | IS | | | -2 | A | TA=25°C | 2 |
| Avalanche Current | IAS | | | -20 | A | | 2 |
| Single-Pulse Avalanche Energy | EAS | | | 20 | mJ | L = 0.1 mH | 2 |
| Maximum Power Dissipation | PD | | | 4 | W | TC=25°C | 2 |
| Maximum Power Dissipation | PD | | | 2.5 | W | TC=70°C | 2 |
| Maximum Power Dissipation | PD | | | 2 | W | TA=25°C | 2 |
| Maximum Power Dissipation | PD | | | 1.4 | W | TA=70°C | 2 |
| Operating Junction and Storage Temperature Range | TJ,TSTG | -55 | | 150 | °C | | 2 |
| Maximum Junction-to-Ambient (t ≤ 10s) | RthJA | | 38 | 50 | °C/W | t ≤10s | 1 |
| Maximum Junction-to-Ambient (steady state) | RthJA | | | 85 | °C/W | Steady-state, per note c | 1 |
| Maximum Junction-to-Foot | RthJF | | 20 | 25 | °C/W | | 1 |
| Drain-Source Breakdown Voltage | VDS | -60 | | | V | VDS=0V, ID=-250μA | 3 |
| Gate-Source Threshold Voltage | VGS(th) | -1 | | -3 | V | VDS=VGS, ID=-250μA | 3 |
| Gate-Source Leakage | IGSS | -100 | | 100 | nA | VDS=0V, VGS=±20V | 3 |
| Zero Gate Voltage Drain Current | IDSS | | | -1 | µA | VDS=-30V, VGS=0V | 3 |
| Zero Gate Voltage Drain Current | IDSS | | | -5 | µA | VDS=-30V, VGS=0V, TJ=55°C | 3 |
| On-State Drain Current | ID(ON) | -30 | | | A | VDS≥-10V, VGS=-10V | 3 |
| Drain-Source On-State Resistance | RDS(ON) | | | 54 | mΩ | VGS=-10V, ID=-5A | 3 |
| Drain-Source On-State Resistance | RDS(ON) | | | 59 | mΩ | VGS=-4.5V, ID=-4.5A | 3 |
| Body Diode Voltage | VSD | | -0.75 | -1.2 | V | IS=-2A, VGS=0V | 4 |
| Pulse Diode Forward Current | ISM | | | -32 | A | | 4 |
## CAD (KiCad official)
- Symbol: `SI9948AEY`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `si9948aey-etched.step` / `si9948aey-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `si9948aey.step` / `si9948aey.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [UMW datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8757271947426717696) (11 pp, sha256 `aaa20b599cbf2f90`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/si9948aey-datasheet.pdf)