# SI9926CDY-T1-GE3

**Vishay Intertech** · MOSFETs · SO-8

SI9926CDY-T1-GE3 from Vishay Intertech, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source of N-channel MOSFET 1; VDS rating 20 V. |
| 2 | G1 | input | Gate of N-channel MOSFET 1; gate-source voltage limit ±12 V. |
| 3 | S2 | passive | Source of N-channel MOSFET 2; VDS rating 20 V. |
| 4 | G2 | input | Gate of N-channel MOSFET 2; gate-source voltage limit ±12 V. |
| 5 | D2 | passive | Drain of N-channel MOSFET 2, tied to pin 6; 8.2 A continuous (10 s) at TA = 25 °C. |
| 6 | D2 | passive | Drain of N-channel MOSFET 2, tied to pin 5; 8.2 A continuous (10 s) at TA = 25 °C. |
| 7 | D1 | passive | Drain of N-channel MOSFET 1, tied to pin 8; 8.2 A continuous (10 s) at TA = 25 °C. |
| 8 | D1 | passive | Drain of N-channel MOSFET 1, tied to pin 7; 8.2 A continuous (10 s) at TA = 25 °C. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Vishay Intertech |
| Package | SO-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |

## CAD (KiCad official)

- Symbol: `SI9926CDY-T1-GE3`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files: `si9926cdy-t1-ge3-etched.step` / `si9926cdy-t1-ge3-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `si9926cdy-t1-ge3.step` / `si9926cdy-t1-ge3.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Vishay Intertech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588879893958836224) (6 pp, sha256 `7db53e6db7e7d522`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/si9926cdy-t1-ge3-datasheet.pdf)