component
SI8661BD-B-ISR
Public Made by Adomby adom
SKYWORKS/SILICON LABS Digital Isolators, SOIC-16-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SI8661BD-B-ISR
SKYWORKS/SILICON LABS · Digital Isolators · SOIC-16-300mil
SI8661BD-B-ISR from SKYWORKS/SILICON LABS, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD1 | power_in | Side 1 power supply, 2.5-5.5 V operating with a 0.1 µF bypass capacitor to GND1 placed close to the package. |
| 2 | A1 | input | Side 1 digital input. |
| 3 | A2 | input | Side 1 digital input. |
| 4 | A3 | input | Side 1 digital input. |
| 5 | A4 | input | Side 1 digital input (Si8661 has 5 inputs on the VDD1 side). |
| 6 | A5 | input | Side 1 digital input (Si8661 has 5 inputs on the VDD1 side). |
| 7 | A6 | output | Side 1 digital output (the single reverse channel of the Si8661, driven from B6). |
| 8 | GND1 | power_in | Side 1 ground. |
| 9 | GND2 | power_in | Side 2 ground. |
| 10 | B6 | input | Side 2 digital input (the single reverse channel of the Si8661, passed to A6). |
| 11 | B5 | output | Side 2 digital output. |
| 12 | B4 | output | Side 2 digital output. |
| 13 | B3 | output | Side 2 digital output. |
| 14 | B2 | output | Side 2 digital output. |
| 15 | B1 | output | Side 2 digital output. |
| 16 | VDD2 | power_in | Side 2 power supply, 2.5-5.5 V operating with a 0.1 µF bypass capacitor to GND2 placed close to the package. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | SKYWORKS/SILICON LABS |
| Package | SOIC-16-300mil |
| Category | Signal Isolation Devices |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Junction Operating Temperature | TJ | 150 | °C | 11 | |||
| Ambient Operating Temperature | TA | -40 | 25 | 125 | °C | 11 | |
| Supply Voltage VDD1 | VDD1 | 2.375 | 5.5 | V | 11 | ||
| Supply Voltage VDD2 | VDD2 | 2.375 | 5.5 | V | 11 | ||
| Storage Temperature | TSTG | -65 | 150 | °C | 26 | ||
| Ambient Temperature Under Bias | TA | -40 | 125 | °C | 26 | ||
| Junction Temperature | TJ | 150 | °C | 26 | |||
| Supply Voltage | VDD1, VDD2 | -0.5 | 7 | V | 26 | ||
| Input Voltage | VI | -0.5 | V | max printed as VDD + 0.5 | 26 | ||
| Output Voltage | VO | -0.5 | V | max printed as VDD + 0.5 | 26 | ||
| Output Current Drive Channel | IO | 10 | mA | 26 | |||
| Lead Solder Temperature | 260 | °C | 10 s | 26 | |||
| Maximum Isolation (Input to Output) | 6500 | VRMS | 1 sec, WB SOIC-16 | 26 | |||
| IC Junction-to-Air Thermal Resistance | θJA | 100 | °C/W | WB SOIC-16 | 24 | ||
| VDD Undervoltage Threshold rising | VDDUV+ | 1.95 | 2.24 | 2.375 | V | VDD1, VDD2 rising | 11 |
| VDD Undervoltage Threshold falling | VDDUV- | 1.88 | 2.16 | 2.325 | V | VDD1, VDD2 falling | 11 |
| VDD Undervoltage Hysteresis | VDDHYS | 50 | 70 | 95 | mV | 11 | |
| Positive-Going Input Threshold | VT+ | 1.4 | 1.67 | 1.9 | V | All inputs rising | 11 |
| Negative-Going Input Threshold | VT- | 1 | 1.23 | 1.4 | V | All inputs falling | 11 |
| Input Hysteresis | VHYS | 0.38 | 0.44 | 0.5 | V | 11 | |
| High Level Input Voltage | VIH | 2 | V | 11 | |||
| Low Level Input Voltage | VIL | 0.8 | V | 11 | |||
| High Level Output Voltage (5 V) | VOH | 4.8 | V | Ioh = -4 mA; min printed as VDD1,VDD2, 0.4; VDD = 5 V ±10% | 11 | ||
| Low Level Output Voltage | VOL | 0.2 | 0.4 | V | Iol = 4 mA | 11 | |
| Input Leakage Current | IL | -10 | 10 | µA | 11 | ||
| DC Supply Current VDD1, VI = 0 (Bx) | IDD1 | 1.7 | 2.7 | mA | Si8661Bx, all inputs 0 V or at supply, VDD = 5 V ±10% | 12 | |
| DC Supply Current VDD2, VI = 0 (Bx) | IDD2 | 3.4 | 5.1 | mA | Si8661Bx, all inputs 0 V or at supply, VDD = 5 V ±10% | 12 | |
| DC Supply Current VDD1, VI = 1 (Bx) | IDD1 | 7.9 | 11.1 | mA | Si8661Bx, all inputs 0 V or at supply, VDD = 5 V ±10% | 12 | |
| DC Supply Current VDD2, VI = 1 (Bx) | IDD2 | 4.8 | 7.2 | mA | Si8661Bx, all inputs 0 V or at supply, VDD = 5 V ±10% | 12 | |
| 1 Mbps Supply Current VDD1 | IDD1 | 4.9 | 6.9 | mA | Si8661Bx, inputs 500 kHz square wave, CI = 15 pF, VDD = 5 V ±10% | 12 | |
| 1 Mbps Supply Current VDD2 | IDD2 | 4.6 | 6.4 | mA | Si8661Bx, inputs 500 kHz square wave, CI = 15 pF, VDD = 5 V ±10% | 12 | |
| 10 Mbps Supply Current VDD1 | IDD1 | 5.2 | 7.3 | mA | Si8661Bx, inputs 5 MHz square wave, CI = 15 pF, VDD = 5 V ±10% | 12 | |
| 10 Mbps Supply Current VDD2 | IDD2 | 6.1 | 8.5 | mA | Si8661Bx, inputs 5 MHz square wave, CI = 15 pF, VDD = 5 V ±10% | 12 | |
| 100 Mbps Supply Current VDD1 (5 V) | IDD1 | 8.8 | 11.8 | mA | Si8661Bx, inputs 50 MHz square wave, CI = 15 pF, VDD = 5 V ±10% | 13 | |
| 100 Mbps Supply Current VDD2 (5 V) | IDD2 | 23 | 29.8 | mA | Si8661Bx, inputs 50 MHz square wave, CI = 15 pF, VDD = 5 V ±10% | 13 | |
| 100 Mbps Supply Current VDD1 (3.3 V) | IDD1 | 7.4 | 9.9 | mA | Si8661Bx, inputs 50 MHz square wave, CI = 15 pF, VDD = 3.3 V ±10% | 17 | |
| 100 Mbps Supply Current VDD2 (3.3 V) | IDD2 | 16.4 | 21.3 | mA | Si8661Bx, inputs 50 MHz square wave, CI = 15 pF, VDD = 3.3 V ±10% | 17 | |
| 100 Mbps Supply Current VDD1 (2.5 V) | IDD1 | 6.7 | 9.1 | mA | Si8661Bx, inputs 50 MHz square wave, CI = 15 pF, VDD = 2.5 V ±5% | 21 | |
| 100 Mbps Supply Current VDD2 (2.5 V) | IDD2 | 13.4 | 17.4 | mA | Si8661Bx, inputs 50 MHz square wave, CI = 15 pF, VDD = 2.5 V ±5% | 21 | |
| Maximum Data Rate | 0 | 150 | Mbps | Si866xBx | 13 | ||
| Minimum Pulse Width | 5 | ns | Si866xBx | 13 | |||
| Propagation Delay (5 V, 3.3 V) | tPHL, tPLH | 5 | 8 | 13 | ns | See Figure 4.1; VDD = 5 V ±10% | 13 |
| Pulse Width Distortion (5 V, 3.3 V) | PWD | 0.2 | 4.5 | ns | /tPLH - tPHL/; See Figure 4.1; VDD = 5 V ±10% | 13 | |
| Propagation Delay Skew (5 V, 3.3 V) | tPSK(P-P) | 2 | 4.5 | ns | VDD = 5 V ±10% | 13 | |
| Channel-Channel Skew | tPSK | 0.4 | 2.5 | ns | VDD = 5 V ±10% | 13 | |
| Propagation Delay (2.5 V) | tPHL, tPLH | 5 | 8 | 14 | ns | See Figure 4.1; VDD = 2.5 V ±5% | 21 |
| Pulse Width Distortion (2.5 V) | PWD | 0.2 | 5 | ns | /tPLH - tPHL/; See Figure 4.1; VDD = 2.5 V ±5% | 21 | |
| Propagation Delay Skew (2.5 V) | tPSK(P-P) | 2 | 5 | ns | VDD = 2.5 V ±5% | 21 | |
| Output Rise Time | tr | 2.5 | 4 | ns | CL = 15 pF (See Figure 4.1) | 13 | |
| Output Fall Time | tf | 2.5 | 4 | ns | CL = 15 pF (See Figure 4.1) | 13 | |
| Common Mode Transient Immunity | CMTI | 35 | 50 | kV/µs | VI = VDD or 0 V, VCM = 1500 V | 14 | |
| Startup Time | tSU | 15 | 40 | µs | 14 | ||
| Peak Eye Diagram Jitter | tJIT(PK) | 350 | ps | 13 | |||
| Output Impedance | ZO | 50 | Ω | approximately 50 Ω, ±40% per note | 11 | ||
| Capacitance (Input-Output) | CIO | 2 | pF | f = 1 MHz, WB SOIC-16 | 22 | ||
| Input Capacitance | CI | 4 | pF | WB SOIC-16 | 22 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | PC | 4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body Components. | 32 |
CAD (KiCad official)
- Symbol:
SI8661BD-B-ISR - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16-300mil (KiCad packages3D, STEP)
- 3D model files:
si8661bd-b-isr-etched.step/si8661bd-b-isr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);si8661bd-b-isr.step/si8661bd-b-isr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: SKYWORKS/SILICON LABS datasheet (42 pp, sha256
268d7e9331d86e3d, retrieved 2026-10-22, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SI8661BD-B-ISR
**SKYWORKS/SILICON LABS** · Digital Isolators · SOIC-16-300mil
SI8661BD-B-ISR from SKYWORKS/SILICON LABS, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD1 | power_in | Side 1 power supply, 2.5-5.5 V operating with a 0.1 µF bypass capacitor to GND1 placed close to the package. |
| 2 | A1 | input | Side 1 digital input. |
| 3 | A2 | input | Side 1 digital input. |
| 4 | A3 | input | Side 1 digital input. |
| 5 | A4 | input | Side 1 digital input (Si8661 has 5 inputs on the VDD1 side). |
| 6 | A5 | input | Side 1 digital input (Si8661 has 5 inputs on the VDD1 side). |
| 7 | A6 | output | Side 1 digital output (the single reverse channel of the Si8661, driven from B6). |
| 8 | GND1 | power_in | Side 1 ground. |
| 9 | GND2 | power_in | Side 2 ground. |
| 10 | B6 | input | Side 2 digital input (the single reverse channel of the Si8661, passed to A6). |
| 11 | B5 | output | Side 2 digital output. |
| 12 | B4 | output | Side 2 digital output. |
| 13 | B3 | output | Side 2 digital output. |
| 14 | B2 | output | Side 2 digital output. |
| 15 | B1 | output | Side 2 digital output. |
| 16 | VDD2 | power_in | Side 2 power supply, 2.5-5.5 V operating with a 0.1 µF bypass capacitor to GND2 placed close to the package. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | SKYWORKS/SILICON LABS |
| Package | SOIC-16-300mil |
| Category | Signal Isolation Devices |
| Pins | 16 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Junction Operating Temperature | TJ | | | 150 | °C | | 11 |
| Ambient Operating Temperature | TA | -40 | 25 | 125 | °C | | 11 |
| Supply Voltage VDD1 | VDD1 | 2.375 | | 5.5 | V | | 11 |
| Supply Voltage VDD2 | VDD2 | 2.375 | | 5.5 | V | | 11 |
| Storage Temperature | TSTG | -65 | | 150 | °C | | 26 |
| Ambient Temperature Under Bias | TA | -40 | | 125 | °C | | 26 |
| Junction Temperature | TJ | | | 150 | °C | | 26 |
| Supply Voltage | VDD1, VDD2 | -0.5 | | 7 | V | | 26 |
| Input Voltage | VI | -0.5 | | | V | max printed as VDD + 0.5 | 26 |
| Output Voltage | VO | -0.5 | | | V | max printed as VDD + 0.5 | 26 |
| Output Current Drive Channel | IO | | | 10 | mA | | 26 |
| Lead Solder Temperature | | | | 260 | °C | 10 s | 26 |
| Maximum Isolation (Input to Output) | | | | 6500 | VRMS | 1 sec, WB SOIC-16 | 26 |
| IC Junction-to-Air Thermal Resistance | θJA | | 100 | | °C/W | WB SOIC-16 | 24 |
| VDD Undervoltage Threshold rising | VDDUV+ | 1.95 | 2.24 | 2.375 | V | VDD1, VDD2 rising | 11 |
| VDD Undervoltage Threshold falling | VDDUV- | 1.88 | 2.16 | 2.325 | V | VDD1, VDD2 falling | 11 |
| VDD Undervoltage Hysteresis | VDDHYS | 50 | 70 | 95 | mV | | 11 |
| Positive-Going Input Threshold | VT+ | 1.4 | 1.67 | 1.9 | V | All inputs rising | 11 |
| Negative-Going Input Threshold | VT- | 1 | 1.23 | 1.4 | V | All inputs falling | 11 |
| Input Hysteresis | VHYS | 0.38 | 0.44 | 0.5 | V | | 11 |
| High Level Input Voltage | VIH | 2 | | | V | | 11 |
| Low Level Input Voltage | VIL | | | 0.8 | V | | 11 |
| High Level Output Voltage (5 V) | VOH | | 4.8 | | V | Ioh = -4 mA; min printed as VDD1,VDD2, 0.4; VDD = 5 V ±10% | 11 |
| Low Level Output Voltage | VOL | | 0.2 | 0.4 | V | Iol = 4 mA | 11 |
| Input Leakage Current | IL | -10 | | 10 | µA | | 11 |
| DC Supply Current VDD1, VI = 0 (Bx) | IDD1 | | 1.7 | 2.7 | mA | Si8661Bx, all inputs 0 V or at supply, VDD = 5 V ±10% | 12 |
| DC Supply Current VDD2, VI = 0 (Bx) | IDD2 | | 3.4 | 5.1 | mA | Si8661Bx, all inputs 0 V or at supply, VDD = 5 V ±10% | 12 |
| DC Supply Current VDD1, VI = 1 (Bx) | IDD1 | | 7.9 | 11.1 | mA | Si8661Bx, all inputs 0 V or at supply, VDD = 5 V ±10% | 12 |
| DC Supply Current VDD2, VI = 1 (Bx) | IDD2 | | 4.8 | 7.2 | mA | Si8661Bx, all inputs 0 V or at supply, VDD = 5 V ±10% | 12 |
| 1 Mbps Supply Current VDD1 | IDD1 | | 4.9 | 6.9 | mA | Si8661Bx, inputs 500 kHz square wave, CI = 15 pF, VDD = 5 V ±10% | 12 |
| 1 Mbps Supply Current VDD2 | IDD2 | | 4.6 | 6.4 | mA | Si8661Bx, inputs 500 kHz square wave, CI = 15 pF, VDD = 5 V ±10% | 12 |
| 10 Mbps Supply Current VDD1 | IDD1 | | 5.2 | 7.3 | mA | Si8661Bx, inputs 5 MHz square wave, CI = 15 pF, VDD = 5 V ±10% | 12 |
| 10 Mbps Supply Current VDD2 | IDD2 | | 6.1 | 8.5 | mA | Si8661Bx, inputs 5 MHz square wave, CI = 15 pF, VDD = 5 V ±10% | 12 |
| 100 Mbps Supply Current VDD1 (5 V) | IDD1 | | 8.8 | 11.8 | mA | Si8661Bx, inputs 50 MHz square wave, CI = 15 pF, VDD = 5 V ±10% | 13 |
| 100 Mbps Supply Current VDD2 (5 V) | IDD2 | | 23 | 29.8 | mA | Si8661Bx, inputs 50 MHz square wave, CI = 15 pF, VDD = 5 V ±10% | 13 |
| 100 Mbps Supply Current VDD1 (3.3 V) | IDD1 | | 7.4 | 9.9 | mA | Si8661Bx, inputs 50 MHz square wave, CI = 15 pF, VDD = 3.3 V ±10% | 17 |
| 100 Mbps Supply Current VDD2 (3.3 V) | IDD2 | | 16.4 | 21.3 | mA | Si8661Bx, inputs 50 MHz square wave, CI = 15 pF, VDD = 3.3 V ±10% | 17 |
| 100 Mbps Supply Current VDD1 (2.5 V) | IDD1 | | 6.7 | 9.1 | mA | Si8661Bx, inputs 50 MHz square wave, CI = 15 pF, VDD = 2.5 V ±5% | 21 |
| 100 Mbps Supply Current VDD2 (2.5 V) | IDD2 | | 13.4 | 17.4 | mA | Si8661Bx, inputs 50 MHz square wave, CI = 15 pF, VDD = 2.5 V ±5% | 21 |
| Maximum Data Rate | | 0 | | 150 | Mbps | Si866xBx | 13 |
| Minimum Pulse Width | | | | 5 | ns | Si866xBx | 13 |
| Propagation Delay (5 V, 3.3 V) | tPHL, tPLH | 5 | 8 | 13 | ns | See Figure 4.1; VDD = 5 V ±10% | 13 |
| Pulse Width Distortion (5 V, 3.3 V) | PWD | | 0.2 | 4.5 | ns | /tPLH - tPHL/; See Figure 4.1; VDD = 5 V ±10% | 13 |
| Propagation Delay Skew (5 V, 3.3 V) | tPSK(P-P) | | 2 | 4.5 | ns | VDD = 5 V ±10% | 13 |
| Channel-Channel Skew | tPSK | | 0.4 | 2.5 | ns | VDD = 5 V ±10% | 13 |
| Propagation Delay (2.5 V) | tPHL, tPLH | 5 | 8 | 14 | ns | See Figure 4.1; VDD = 2.5 V ±5% | 21 |
| Pulse Width Distortion (2.5 V) | PWD | | 0.2 | 5 | ns | /tPLH - tPHL/; See Figure 4.1; VDD = 2.5 V ±5% | 21 |
| Propagation Delay Skew (2.5 V) | tPSK(P-P) | | 2 | 5 | ns | VDD = 2.5 V ±5% | 21 |
| Output Rise Time | tr | | 2.5 | 4 | ns | CL = 15 pF (See Figure 4.1) | 13 |
| Output Fall Time | tf | | 2.5 | 4 | ns | CL = 15 pF (See Figure 4.1) | 13 |
| Common Mode Transient Immunity | CMTI | 35 | 50 | | kV/µs | VI = VDD or 0 V, VCM = 1500 V | 14 |
| Startup Time | tSU | | 15 | 40 | µs | | 14 |
| Peak Eye Diagram Jitter | tJIT(PK) | | 350 | | ps | | 13 |
| Output Impedance | ZO | | 50 | | Ω | approximately 50 Ω, ±40% per note | 11 |
| Capacitance (Input-Output) | CIO | | 2 | | pF | f = 1 MHz, WB SOIC-16 | 22 |
| Input Capacitance | CI | | 4 | | pF | WB SOIC-16 | 22 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | PC | | 4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body Components. | 32 |
## CAD (KiCad official)
- Symbol: `SI8661BD-B-ISR`
- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`
- 3D model: SOIC-16-300mil (KiCad packages3D, STEP)
- 3D model files: `si8661bd-b-isr-etched.step` / `si8661bd-b-isr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `si8661bd-b-isr.step` / `si8661bd-b-isr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [SKYWORKS/SILICON LABS datasheet](docs/si8661bd-b-isr-datasheet.pdf) (42 pp, sha256 `268d7e9331d86e3d`, retrieved 2026-10-22, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/si8661bd-b-isr-datasheet.pdf)