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SI8641BB-B-IS1

Public Made by Adom

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Skyworks Solutions Digital Isolators, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SI8641BB-B-IS1

Skyworks Solutions · Digital Isolators · SOIC-16

SI8641BB-B-IS1 from Skyworks Solutions, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD1 power_in Side 1 power supply, specified as powered for 2.5 V < VDD < 5.5 V, and requires a 0.1 µF bypass capacitor between VDD1 and GND1 placed as close to the package as possible.
2 GND1 power_in Side 1 ground; on narrow-body devices this pin must be externally connected to ground.
3 A1 input Side 1 digital input, a Schmitt-trigger input for high noise immunity.
4 A2 input Side 1 digital input, a Schmitt-trigger input for high noise immunity.
5 A3 bidirectional Side 1 digital input or output.
6 A4 bidirectional Side 1 digital input or output.
7 EN1 input Side 1 active high enable; when disabled (EN = 0) the Side 1 outputs are driven to high impedance, and it is recommended to tie this input to a defined logic level in noisy environments.
8 GND1 power_in Side 1 ground; on narrow-body devices this pin must be externally connected to ground.
9 GND2 power_in Side 2 ground; on narrow-body devices this pin must be connected to external ground.
10 EN2 input Side 2 active high enable; when disabled (EN = 0) the Side 2 outputs are driven to high impedance.
11 B4 bidirectional Side 2 digital input or output.
12 B3 bidirectional Side 2 digital input or output.
13 B2 output Side 2 digital output.
14 B1 output Side 2 digital output.
15 GND2 power_in Side 2 ground; on narrow-body devices this pin must be connected to external ground.
16 VDD2 power_in Side 2 power supply, specified as powered for 2.5 V < VDD < 5.5 V, and requires a 0.1 µF bypass capacitor between VDD2 and GND2.

Key specifications

Parameter Value
Manufacturer Skyworks Solutions
Package SOIC-16
Category Signal Isolation Devices
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage VDD1 (recommended) VDD1 2.375 5.5 V 12
Supply Voltage VDD2 (recommended) VDD2 2.375 5.5 V 12
Ambient Operating Temperature TA -40 25 125 °C Max depends on data frequency, load, channels and supply (table note 1) 12
Junction Operating Temperature TJ 150 °C 12
Storage Temperature TSTG -65 150 °C 28
Supply Voltage VDD1, VDD2 -0.5 7 V 28
Input Voltage VI -0.5 V Max printed as VDD + 0.5 V 28
Output Voltage VO -0.5 V Max printed as VDD + 0.5 V 28
Output Current Drive Channel IO 10 mA 28
Lead Solder Temperature 260 °C 10 s 28
Maximum Isolation (Input to Output) 6500 VRMS 1 s, WB SOIC-16 28
VDD Undervoltage Threshold rising VDDUV+ 1.95 2.24 2.375 V VDD 5 V ±10%; VDD1, VDD2 rising 12
VDD Undervoltage Threshold falling VDDUV- 1.88 2.16 2.325 V VDD 5 V ±10%; VDD1, VDD2 falling 12
VDD Undervoltage Hysteresis VDDHYS 50 70 95 mV VDD 5 V ±10% 12
Positive-Going Input Threshold VT+ 1.4 1.67 1.9 V VDD 5 V ±10%; all inputs rising 12
Negative-Going Input Threshold VT- 1 1.23 1.4 V VDD 5 V ±10%; all inputs falling 12
Input Hysteresis VHYS 0.38 0.44 0.5 V VDD 5 V ±10% 12
High Level Input Voltage VIH 2 V VDD 5 V ±10% 12
Low Level Input Voltage VIL 0.8 V VDD 5 V ±10% 12
Low Level Output Voltage VOL 0.2 0.4 V VDD 5 V ±10%; lol = 4 mA 12
Input Leakage Current IL -10 10 µA Si864xxA/B/C/D; printed ±10 12
Enable Input Current IENH, IENL 2 µA Si864xxA/B/C/D; VENx = VIH or VIL 12
DC Supply Current VDD1 (VI = 0 Bx / 1 Ex) 1.4 2.2 mA VDD 5 V ±10%; all inputs 0 V or at supply; Si8641xA/B/C/D 13
DC Supply Current VDD2 (VI = 0 Bx / 1 Ex) 2.3 3.7 mA VDD 5 V ±10%; all inputs 0 V or at supply; Si8641xA/B/C/D 13
DC Supply Current VDD1 (VI = 1 Bx / 0 Ex) 5.2 7.4 mA VDD 5 V ±10%; all inputs 0 V or at supply; Si8641xA/B/C/D 13
DC Supply Current VDD2 (VI = 1 Bx / 0 Ex) 3.6 5.4 mA VDD 5 V ±10%; all inputs 0 V or at supply; Si8641xA/B/C/D 13
1 Mbps Supply Current VDD1 3.4 4.8 mA VDD 5 V ±10%; all inputs 500 kHz square wave, CI = 15 pF; Si8641Bx, Ex 13
1 Mbps Supply Current VDD2 3.3 4.6 mA VDD 5 V ±10%; all inputs 500 kHz square wave, CI = 15 pF; Si8641Bx, Ex 13
10 Mbps Supply Current VDD1 3.7 5.2 mA VDD 5 V ±10%; all inputs 5 MHz square wave, CI = 15 pF; Si8641Bx, Ex 14
10 Mbps Supply Current VDD2 4.1 5.8 mA VDD 5 V ±10%; all inputs 5 MHz square wave, CI = 15 pF; Si8641Bx, Ex 14
100 Mbps Supply Current VDD1 7.3 9.8 mA VDD 5 V ±10%; all inputs 50 MHz square wave, CI = 15 pF; Si8641Bx, Ex 14
100 Mbps Supply Current VDD2 14.3 18.5 mA VDD 5 V ±10%; all inputs 50 MHz square wave, CI = 15 pF; Si8641Bx, Ex 14
1 Mbps Supply Current VDD1 (3.3 V table) 3.4 4.8 mA VDD 3.3 V ±10%; all inputs 500 kHz square wave, CI = 15 pF; Si8641Bx, Ex 13
10 Mbps Supply Current VDD1 (3.3 V) 3.5 4.9 mA VDD 3.3 V ±10%; all inputs 5 MHz square wave, CI = 15 pF; Si8641Bx, Ex 18
10 Mbps Supply Current VDD2 (3.3 V) 3.6 5.1 mA VDD 3.3 V ±10%; all inputs 5 MHz square wave, CI = 15 pF; Si8641Bx, Ex 18
100 Mbps Supply Current VDD1 (3.3 V) 5.9 7.9 mA VDD 3.3 V ±10%; all inputs 50 MHz square wave, CI = 15 pF; Si8641Bx, Ex 19
100 Mbps Supply Current VDD2 (3.3 V) 10.3 13.4 mA VDD 3.3 V ±10%; all inputs 50 MHz square wave, CI = 15 pF; Si8641Bx, Ex 19
10 Mbps Supply Current VDD1 (2.5 V) 3.5 4.8 mA VDD 2.5 V ±5%; all inputs 5 MHz square wave, CI = 15 pF; Si8641Bx, Ex 22
10 Mbps Supply Current VDD2 (2.5 V) 3.4 4.8 mA VDD 2.5 V ±5%; all inputs 5 MHz square wave, CI = 15 pF; Si8641Bx, Ex 22
100 Mbps Supply Current VDD1 (2.5 V) 5.2 7 mA VDD 2.5 V ±5%; all inputs 50 MHz square wave, CI = 15 pF; Si8641Bx, Ex 23
100 Mbps Supply Current VDD2 (2.5 V) 8.5 11.1 mA VDD 2.5 V ±5%; all inputs 50 MHz square wave, CI = 15 pF; Si8641Bx, Ex 23
Maximum Data Rate 0 150 Mbps Si864xBx, Ex 14
Minimum Pulse Width 5 ns Si864xBx, Ex 14
Propagation Delay (5 V, 3.3 V tables) tPHL, tPLH 5 8 13 ns Si864xBx, Ex; See Figure 4.2 14
Propagation Delay (2.5 V table) tPHL, tPLH 5 8 14 ns Si864xBx, Ex; See Figure 4.2 23
Pulse Width Distortion (5 V, 3.3 V tables) PWD 0.2 4.5 ns /tPLH, tPHL/; See Figure 4.2 14
Pulse Width Distortion (2.5 V table) PWD 0.2 5 ns /tPLH, tPHL/; See Figure 4.2 23
Propagation Delay Skew (5 V, 3.3 V tables) tPSK(P-P) 2 4.5 ns See Figure 4.2 14
Propagation Delay Skew (2.5 V table) tPSK(P-P) 2 5 ns See Figure 4.2 23
Channel-Channel Skew tPSK 0.4 2.5 ns 14
Output Rise Time tr 2.5 4 ns CL = 15 pF 14
Output Fall Time tf 2.5 4 ns CL = 15 pF 15
Common Mode Transient Immunity CMTI 35 60 kV/µs Si86xxxA/B/C/D; VI = VDD or 0 V, VCM = 1500 V 15
Enable to Data Valid ten1 6 11 ns See Figure 4.1 15
Enable to Data Tri-State ten2 8 12 ns See Figure 4.1 15
Input power loss to valid default output tSD 8 12 ns See Figure 3.1 15
Start-up Time tSU 15 40 µs 15
VOH High Level Output Voltage (5 V) VOH 4.8 V loh = -4 mA; min printed as VDD1, VDD2, 0.4 V 12
VOH High Level Output Voltage (3.3 V) VOH 3.1 V loh = -4 mA; min printed as VDD1, VDD2, 0.4 V 17
VOH High Level Output Voltage (2.5 V) VOH 2.3 V loh = -4 mA; min printed as VDD1, VDD2, 0.4 V 21
IC Junction-to-Air Thermal Resistance θJA 100 °C/W WB SOIC-16 27

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing PC 4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body Components. 35

CAD (KiCad official)

  • Symbol: SI8641BB-B-IS1
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: si8641bb-b-is1-etched.step / si8641bb-b-is1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); si8641bb-b-is1.step / si8641bb-b-is1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Skyworks Solutions datasheet (46 pp, sha256 032aeb8b1ade5e14, retrieved 2026-10-21, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF