component
SI8602AB-B-IS
Public Made by Adomby adom
Skyworks Solutions I2C Isolators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SI8602AB-B-IS
Skyworks Solutions · I2C Isolators · SOIC-8
SI8602AB-B-IS from Skyworks Solutions, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | AVDD | power_in | Side A power supply terminal; connect to a source of 3.0 to 5.5 V. |
| 2 | ASDA | bidirectional | Side A data (open drain) input or output. |
| 3 | ASCL | input | Side A clock input; standard CMOS input for Si8602. |
| 4 | AGND | power_in | Side A ground terminal. |
| 5 | BGND | power_in | Side B ground terminal. |
| 6 | BSCL | output | Side B clock output; push-pull output for Si8602. |
| 7 | BSDA | bidirectional | Side B data (open drain) input or output. |
| 8 | BVDD | power_in | Side B power supply terminal; connect to a source of 3.0 to 5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Skyworks Solutions |
| Package | SOIC-8 |
| Category | Signal Isolation Devices |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Ambient Operating Temperature | TA | -40 | 25 | 125 | °C | 13 | |
| Supply Voltage AVDD | AVDD | 3 | 5.5 | V | 13 | ||
| Supply Voltage BVDD | BVDD | 3 | 5.5 | V | 13 | ||
| Si8602 AVDD Current | Idda | 1.8 | 2.7 | mA | All channels = 0 dc | 13 | |
| Si8602 BVDD Current | Iddb | 1.8 | 2.7 | mA | All channels = 0 dc | 13 | |
| Si8602 AVDD Current | Idda | 4.7 | 7.1 | mA | All channels = 1 dc | 13 | |
| Si8602 BVDD Current | Iddb | 3.1 | 4.7 | mA | All channels = 1 dc | 13 | |
| Si8602 AVDD Current | Idda | 2.5 | 3.8 | mA | All channels = 1.7 MHz | 13 | |
| Si8602 BVDD Current | Iddb | 2.1 | 3.2 | mA | All channels = 1.7 MHz | 13 | |
| I2C Logic Input Threshold (Side A) | I2CVT (Side A) | 410 | 540 | mV | 14 | ||
| I2C Logic Low Output Voltage (Side A) | I2CVOL (Side A) | 540 | 800 | mV | ISDAA, ISCLA (>0.5 mA, <3.0 mA) | 14 | |
| I2C Input/Output Logic Low Level Difference (Side A) | I2CΔV (Side A) | 50 | mV | ISDAA, ISCLA (>0.5 mA, <3.0 mA) | 14 | ||
| Logic Low Input Voltage (Side B) | I2CVIL (Side B) | 0.8 | V | 14 | |||
| Logic High Input Voltage (Side B) | I2CVIH (Side B) | 2 | V | 14 | |||
| Logic Low Output Voltage (Side B) | I2CVOL (Side B) | 500 | mV | ISCLB = 35 mA | 14 | ||
| SCL and SDA Logic High Leakage | Isdaa, Isdab, Iscla, Isclb | 2 | 10 | µA | SDAA, SCLA = VSSA; SDAB, SCLB = VSSB | 14 | |
| Pin Capacitance Side A | CA | 10 | pF | 14 | |||
| Pin Capacitance Side B | CB | 10 | pF | 14 | |||
| Maximum I2C Bus Frequency | Fmax | 1.7 | MHz | 15 | |||
| Propagation Delay Side A to B Rising, 5 V | Tphab | 38 | 45 | ns | No bus capacitance, R1 = 1400, R2 = 499; Side A measured at 0.6 V | 15 | |
| Propagation Delay Side A to B Falling, 5 V | Tplab | 15 | 26 | ns | No bus capacitance, R1 = 1400, R2 = 499; Side A measured at 0.6 V | 15 | |
| Propagation Delay Side B to A Rising, 5 V | Tphba | 33 | 46 | ns | No bus capacitance, R1 = 1400, R2 = 499 | 15 | |
| Propagation Delay Side B to A Falling, 5 V | Tplba | 11 | 22 | ns | No bus capacitance, R1 = 1400, R2 = 499 | 15 | |
| Propagation Delay Side A to B Rising, 3.3 V | Tphab | 44 | 55 | ns | No bus capacitance, R1 = 806, R2 = 499; Side A measured at 0.6 V | 15 | |
| Propagation Delay Side A to B Falling, 3.3 V | Tplab | 17 | 29 | ns | No bus capacitance, R1 = 806, R2 = 499; Side A measured at 0.6 V | 15 | |
| Propagation Delay Side B to A Rising, 3.3 V | Tphba | 30 | 40 | ns | No bus capacitance, R1 = 806, R2 = 499 | 15 | |
| Propagation Delay Side B to A Falling, 3.3 V | Tplba | 14 | 27 | ns | No bus capacitance, R1 = 806, R2 = 499 | 15 | |
| Pulse Width Distortion Side A Low to Side B Low, 5 V | PWDAB | 22 | 32 | ns | No bus capacitance, R1 = 1400, R2 = 499 | 15 | |
| Pulse Width Distortion Side B Low to Side A Low, 5 V | PWDBA | 21 | 32 | ns | No bus capacitance, R1 = 1400, R2 = 499 | 15 | |
| Pulse Width Distortion Side A Low to Side B Low, 3.3 V | PWDAB | 27 | 35 | ns | No bus capacitance, R1 = 806, R2 = 499 | 15 | |
| Pulse Width Distortion Side B Low to Side A Low, 3.3 V | PWDBA | 15 | 25 | ns | No bus capacitance, R1 = 806, R2 = 499 | 15 | |
| Positive-Going Input Threshold | VT+ | 1.4 | 1.67 | 1.9 | V | All inputs rising | 16 |
| Negative-Going Input Threshold | VT- | 1 | 1.23 | 1.4 | V | All inputs falling | 16 |
| Input Hysteresis | VHYS | 0.38 | 0.44 | 0.5 | V | 16 | |
| High Level Input Voltage | VIH | 2 | V | 16 | |||
| Low Level Input Voltage | VIL | 0.8 | V | 16 | |||
| High Level Output Voltage | VOH | 4.8 | V | loh = -4 mA | 16 | ||
| Low Level Output Voltage | VOL | 0.2 | 0.4 | V | lol = 4 mA | 16 | |
| Input Leakage Current | IL | -10 | 10 | µA | 16 | ||
| Output Impedance | ZO | 50 | Ω | 16 | |||
| Maximum Data Rate | 0 | 10 | Mbps | 16 | |||
| Minimum Pulse Width | 40 | ns | 16 | ||||
| Propagation Delay | tPHL, tPLH | 20 | ns | See Figure 5.1 Propagation Delay Timing (Non-I2C Channels) | 16 | ||
| Pulse Width Distortion | PWD | 12 | ns | See Figure 5.1 Propagation Delay Timing (Non-I2C Channels) | 16 | ||
| Propagation Delay Skew | tPSK(P-P) | 20 | ns | 16 | |||
| Channel-Channel Skew | tPSK | 10 | ns | 16 | |||
| Output Rise Time | tr | 2.5 | 4 | ns | C3 = 15 pF | 16 | |
| Output Fall Time | tf | 2.5 | 4 | ns | C3 = 15 pF | 16 | |
| Peak Eye Diagram Jitter | tJIT(PK) | 350 | ps | 16 | |||
| VDD Undervoltage Threshold rising | VDDUV+ | 1.95 | 2.24 | 2.375 | V | VDD1, VDD2 rising | 17 |
| VDD Undervoltage Threshold falling | VDDUV- | 1.88 | 2.16 | 2.325 | V | VDD1, VDD2 falling | 17 |
| VDD Undervoltage Hysteresis | VDDHYS | 50 | 70 | 95 | mV | 17 | |
| Common Mode Transient Immunity | CMTI | 35 | 50 | kV/µs | VI = VDD or 0 V, VCM = 1500 V | 17 | |
| Shut Down Time from UVLO | tSD | 3 | µs | 17 | |||
| Start-up Time | tSTART | 15 | 40 | µs | 17 | ||
| Junction-to-Air Thermal Resistance (NB SOIC-8) | θJA | 140 | °C/W | NB SOIC-8 | 21 | ||
| Storage Temperature | TSTG | -65 | 150 | ºC | 22 | ||
| Ambient Temperature Under Bias | TA | -40 | 125 | ºC | 22 | ||
| Junction Temperature | TJ | 150 | °C | 22 | |||
| Supply Voltage | VDD | -0.5 | 7 | V | 22 | ||
| Input Voltage | VI | -0.5 | V | max printed as VDD + 0.5 V | 22 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | PC | 4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body Components. | 32 |
CAD (KiCad official)
- Symbol:
SI8602AB-B-IS - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
si8602ab-b-is-etched.step/si8602ab-b-is-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);si8602ab-b-is.step/si8602ab-b-is.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Skyworks Solutions datasheet (39 pp, sha256
52656d4ac754bd94, retrieved 2026-10-31, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SI8602AB-B-IS
**Skyworks Solutions** · I2C Isolators · SOIC-8
SI8602AB-B-IS from Skyworks Solutions, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | AVDD | power_in | Side A power supply terminal; connect to a source of 3.0 to 5.5 V. |
| 2 | ASDA | bidirectional | Side A data (open drain) input or output. |
| 3 | ASCL | input | Side A clock input; standard CMOS input for Si8602. |
| 4 | AGND | power_in | Side A ground terminal. |
| 5 | BGND | power_in | Side B ground terminal. |
| 6 | BSCL | output | Side B clock output; push-pull output for Si8602. |
| 7 | BSDA | bidirectional | Side B data (open drain) input or output. |
| 8 | BVDD | power_in | Side B power supply terminal; connect to a source of 3.0 to 5.5 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Skyworks Solutions |
| Package | SOIC-8 |
| Category | Signal Isolation Devices |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Ambient Operating Temperature | TA | -40 | 25 | 125 | °C | | 13 |
| Supply Voltage AVDD | AVDD | 3 | | 5.5 | V | | 13 |
| Supply Voltage BVDD | BVDD | 3 | | 5.5 | V | | 13 |
| Si8602 AVDD Current | Idda | | 1.8 | 2.7 | mA | All channels = 0 dc | 13 |
| Si8602 BVDD Current | Iddb | | 1.8 | 2.7 | mA | All channels = 0 dc | 13 |
| Si8602 AVDD Current | Idda | | 4.7 | 7.1 | mA | All channels = 1 dc | 13 |
| Si8602 BVDD Current | Iddb | | 3.1 | 4.7 | mA | All channels = 1 dc | 13 |
| Si8602 AVDD Current | Idda | | 2.5 | 3.8 | mA | All channels = 1.7 MHz | 13 |
| Si8602 BVDD Current | Iddb | | 2.1 | 3.2 | mA | All channels = 1.7 MHz | 13 |
| I2C Logic Input Threshold (Side A) | I2CVT (Side A) | 410 | | 540 | mV | | 14 |
| I2C Logic Low Output Voltage (Side A) | I2CVOL (Side A) | 540 | | 800 | mV | ISDAA, ISCLA (>0.5 mA, <3.0 mA) | 14 |
| I2C Input/Output Logic Low Level Difference (Side A) | I2CΔV (Side A) | 50 | | | mV | ISDAA, ISCLA (>0.5 mA, <3.0 mA) | 14 |
| Logic Low Input Voltage (Side B) | I2CVIL (Side B) | | | 0.8 | V | | 14 |
| Logic High Input Voltage (Side B) | I2CVIH (Side B) | 2 | | | V | | 14 |
| Logic Low Output Voltage (Side B) | I2CVOL (Side B) | | | 500 | mV | ISCLB = 35 mA | 14 |
| SCL and SDA Logic High Leakage | Isdaa, Isdab, Iscla, Isclb | | 2 | 10 | µA | SDAA, SCLA = VSSA; SDAB, SCLB = VSSB | 14 |
| Pin Capacitance Side A | CA | | 10 | | pF | | 14 |
| Pin Capacitance Side B | CB | | 10 | | pF | | 14 |
| Maximum I2C Bus Frequency | Fmax | | | 1.7 | MHz | | 15 |
| Propagation Delay Side A to B Rising, 5 V | Tphab | | 38 | 45 | ns | No bus capacitance, R1 = 1400, R2 = 499; Side A measured at 0.6 V | 15 |
| Propagation Delay Side A to B Falling, 5 V | Tplab | | 15 | 26 | ns | No bus capacitance, R1 = 1400, R2 = 499; Side A measured at 0.6 V | 15 |
| Propagation Delay Side B to A Rising, 5 V | Tphba | | 33 | 46 | ns | No bus capacitance, R1 = 1400, R2 = 499 | 15 |
| Propagation Delay Side B to A Falling, 5 V | Tplba | | 11 | 22 | ns | No bus capacitance, R1 = 1400, R2 = 499 | 15 |
| Propagation Delay Side A to B Rising, 3.3 V | Tphab | | 44 | 55 | ns | No bus capacitance, R1 = 806, R2 = 499; Side A measured at 0.6 V | 15 |
| Propagation Delay Side A to B Falling, 3.3 V | Tplab | | 17 | 29 | ns | No bus capacitance, R1 = 806, R2 = 499; Side A measured at 0.6 V | 15 |
| Propagation Delay Side B to A Rising, 3.3 V | Tphba | | 30 | 40 | ns | No bus capacitance, R1 = 806, R2 = 499 | 15 |
| Propagation Delay Side B to A Falling, 3.3 V | Tplba | | 14 | 27 | ns | No bus capacitance, R1 = 806, R2 = 499 | 15 |
| Pulse Width Distortion Side A Low to Side B Low, 5 V | PWDAB | | 22 | 32 | ns | No bus capacitance, R1 = 1400, R2 = 499 | 15 |
| Pulse Width Distortion Side B Low to Side A Low, 5 V | PWDBA | | 21 | 32 | ns | No bus capacitance, R1 = 1400, R2 = 499 | 15 |
| Pulse Width Distortion Side A Low to Side B Low, 3.3 V | PWDAB | | 27 | 35 | ns | No bus capacitance, R1 = 806, R2 = 499 | 15 |
| Pulse Width Distortion Side B Low to Side A Low, 3.3 V | PWDBA | | 15 | 25 | ns | No bus capacitance, R1 = 806, R2 = 499 | 15 |
| Positive-Going Input Threshold | VT+ | 1.4 | 1.67 | 1.9 | V | All inputs rising | 16 |
| Negative-Going Input Threshold | VT- | 1 | 1.23 | 1.4 | V | All inputs falling | 16 |
| Input Hysteresis | VHYS | 0.38 | 0.44 | 0.5 | V | | 16 |
| High Level Input Voltage | VIH | 2 | | | V | | 16 |
| Low Level Input Voltage | VIL | | | 0.8 | V | | 16 |
| High Level Output Voltage | VOH | 4.8 | | | V | loh = -4 mA | 16 |
| Low Level Output Voltage | VOL | | 0.2 | 0.4 | V | lol = 4 mA | 16 |
| Input Leakage Current | IL | -10 | | 10 | µA | | 16 |
| Output Impedance | ZO | | 50 | | Ω | | 16 |
| Maximum Data Rate | | 0 | | 10 | Mbps | | 16 |
| Minimum Pulse Width | | | | 40 | ns | | 16 |
| Propagation Delay | tPHL, tPLH | | | 20 | ns | See Figure 5.1 Propagation Delay Timing (Non-I2C Channels) | 16 |
| Pulse Width Distortion | PWD | | | 12 | ns | See Figure 5.1 Propagation Delay Timing (Non-I2C Channels) | 16 |
| Propagation Delay Skew | tPSK(P-P) | | | 20 | ns | | 16 |
| Channel-Channel Skew | tPSK | | | 10 | ns | | 16 |
| Output Rise Time | tr | | 2.5 | 4 | ns | C3 = 15 pF | 16 |
| Output Fall Time | tf | | 2.5 | 4 | ns | C3 = 15 pF | 16 |
| Peak Eye Diagram Jitter | tJIT(PK) | | 350 | | ps | | 16 |
| VDD Undervoltage Threshold rising | VDDUV+ | 1.95 | 2.24 | 2.375 | V | VDD1, VDD2 rising | 17 |
| VDD Undervoltage Threshold falling | VDDUV- | 1.88 | 2.16 | 2.325 | V | VDD1, VDD2 falling | 17 |
| VDD Undervoltage Hysteresis | VDDHYS | 50 | 70 | 95 | mV | | 17 |
| Common Mode Transient Immunity | CMTI | 35 | 50 | | kV/µs | VI = VDD or 0 V, VCM = 1500 V | 17 |
| Shut Down Time from UVLO | tSD | | 3 | | µs | | 17 |
| Start-up Time | tSTART | | 15 | 40 | µs | | 17 |
| Junction-to-Air Thermal Resistance (NB SOIC-8) | θJA | | 140 | | °C/W | NB SOIC-8 | 21 |
| Storage Temperature | TSTG | -65 | | 150 | ºC | | 22 |
| Ambient Temperature Under Bias | TA | -40 | | 125 | ºC | | 22 |
| Junction Temperature | TJ | | | 150 | °C | | 22 |
| Supply Voltage | VDD | -0.5 | | 7 | V | | 22 |
| Input Voltage | VI | -0.5 | | | V | max printed as VDD + 0.5 V | 22 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | PC | | 4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body Components. | 32 |
## CAD (KiCad official)
- Symbol: `SI8602AB-B-IS`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `si8602ab-b-is-etched.step` / `si8602ab-b-is-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `si8602ab-b-is.step` / `si8602ab-b-is.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Skyworks Solutions datasheet](docs/si8602ab-b-is-datasheet.pdf) (39 pp, sha256 `52656d4ac754bd94`, retrieved 2026-10-31, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/si8602ab-b-is-datasheet.pdf)