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Contents

README

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SI8422BB-D-ISR

SILICON LABS · Digital Isolators · SOIC-8

SI8422BB-D-ISR from SILICON LABS, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD1 power_in Side 1 power supply, operating range 2.6 to 5.5 V, requires a 0.1 µF bypass capacitor to GND1 placed close to the package.
2 A1 bidirectional Side 1 digital input or output (channel A1).
3 A2 bidirectional Side 1 digital input or output (channel A2).
4 GND1 power_in Side 1 ground.
5 GND2 power_in Side 2 ground.
6 B2 bidirectional Side 2 digital input or output (channel B2).
7 B1 bidirectional Side 2 digital input or output (channel B1).
8 VDD2 power_in Side 2 power supply, operating range 2.6 to 5.5 V, requires a 0.1 µF bypass capacitor to GND2 placed close to the package.

Key specifications

Parameter Value
Manufacturer SILICON LABS
Package SOIC-8
Category Interface ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Ambient Operating Temperature TA -40 25 125 °C 10
Supply Voltage VDD1 VDD1 2.7 5.5 V 10
Supply Voltage VDD2 VDD2 2.7 5.5 V 10
Storage Temperature TSTG -65 150 °C 25
Operating Temperature TA -40 125 °C 25
Junction Temperature TJ 150 °C 25
Supply Voltage VDD1, VDD2 -0.5 6 V 25
Output Current Drive Channel IO 10 mA 25
Lead Solder Temperature 260 °C 10 s 25
Maximum Isolation Voltage NB SOIC-8 4500 VRMS 1 s 25
IC Junction-to-Air Thermal Resistance NB SOIC-8 θJA 140 °C/W NB SOIC-8 24
VDD Undervoltage Threshold VDDUV+ 2.15 2.3 2.5 V VDD1, VDD2 rising 10
VDD Negative-Going Lockout Hysteresis VDDHYS 45 75 95 mV 10
Positive-Going Input Threshold VT+ 1.6 1.9 V All inputs rising 10
Negative-Going Input Threshold VT- 1.1 1.4 V All inputs falling 10
Input Hysteresis VHYS 0.4 0.45 0.5 V 10
High Level Input Voltage VIH 2 V 10
Low Level Input Voltage VIL 0.8 V 10
High Level Output Voltage (5 V) VOH 4.8 V loh = -4 mA; VDD1, VDD2 = 5 V ±10%; min printed as VDD1,VDD2, 0.4 10
Low Level Output Voltage VOL 0.2 0.4 V lol = 4 mA 10
Input Leakage Current IL -10 10 μA 10
Si8422 VDD1 DC Supply Current, inputs 0 3.7 5.6 mA All inputs 0 DC; VDD = 5 V ±10% 11
Si8422 VDD2 DC Supply Current, inputs 0 3.7 5.6 mA All inputs 0 DC; VDD = 5 V ±10% 11
Si8422 VDD1 DC Supply Current, inputs 1 1.7 2.6 mA All inputs 1 DC; VDD = 5 V ±10% 11
Si8422 VDD2 DC Supply Current, inputs 1 1.7 2.6 mA All inputs 1 DC; VDD = 5 V ±10% 11
Si8422 VDD1 Supply Current 1 Mbps 2.8 4.2 mA All inputs = 500 kHz square wave, CL = 15 pF; VDD = 5 V ±10% 11
Si8422 VDD2 Supply Current 1 Mbps 2.8 4.2 mA All inputs = 500 kHz square wave, CL = 15 pF; VDD = 5 V ±10% 11
Si8422Bx VDD1 Supply Current 10 Mbps (5 V) 3.2 4.5 mA All inputs = 5 MHz square wave, CL = 15 pF; VDD = 5 V ±10% 12
Si8422Bx VDD2 Supply Current 10 Mbps (5 V) 3.2 4.5 mA All inputs = 5 MHz square wave, CL = 15 pF; VDD = 5 V ±10% 12
Si8422Bx VDD1 Supply Current 100 Mbps (5 V) 6.8 8.5 mA All inputs = 50 MHz square wave, CL = 15 pF; VDD = 5 V ±10% 12
Si8422Bx VDD2 Supply Current 100 Mbps (5 V) 6.8 8.5 mA All inputs = 50 MHz square wave, CL = 15 pF; VDD = 5 V ±10% 12
Maximum Data Rate (Bx) 0 150 Mbps Si842xBx 13
Minimum Pulse Width (Bx) 6 ns Si842xBx 13
Propagation Delay (Bx) tPHL, tPLH 4 8 11 ns See Figure 5.1 Propagation Delay Timing 13
Pulse Width Distortion /tPLH - tPHL/ (Bx) PWD 1.5 3 ns See Figure 5.1 Propagation Delay Timing 13
Propagation Delay Skew (Bx) tPSK(P-P) 2 3 ns 13
Channel-Channel Skew (Bx) tPSK 0.5 1.5 ns 13
Output Rise Time tr 2 4 ns CL = 15 pF 13
Output Fall Time tf 2 4 ns CL = 15 pF 13
Common Mode Transient Immunity CMTI 20 45 kV/μs VI = VDD or 0 V 13
Start-up Time tSU 15 40 μs 13
High Level Output Voltage (3.3 V) VOH 3.1 V loh = -4 mA; VDD1, VDD2 = 3.3 V ±10%; min printed as VDD1,VDD2, 0.4 14
Si8422Bx VDD1 Supply Current 10 Mbps (3.3 V) 3 4.4 mA All inputs = 5 MHz square wave, CL = 15 pF; VDD = 3.3 V ±10% 16
Si8422Bx VDD2 Supply Current 10 Mbps (3.3 V) 3 4.4 mA All inputs = 5 MHz square wave, CL = 15 pF; VDD = 3.3 V ±10% 16
Si8422Bx VDD1 Supply Current 100 Mbps (3.3 V) 5.3 6.6 mA All inputs = 50 MHz square wave, CL = 15 pF; VDD = 3.3 V ±10% 16
Si8422Bx VDD2 Supply Current 100 Mbps (3.3 V) 5.3 6.6 mA All inputs = 50 MHz square wave, CL = 15 pF; VDD = 3.3 V ±10% 16
High Level Output Voltage (2.70 V) VOH 2.3 V loh = -4 mA; VDD1 = VDD2 = 2.70 V; min printed as VDD1,VDD2, 0.4 18
Si8422Bx VDD1 Supply Current 10 Mbps (2.70 V) 2.9 4.3 mA All inputs = 5 MHz square wave, CL = 15 pF; VDD = 2.70 V 20
Si8422Bx VDD2 Supply Current 10 Mbps (2.70 V) 2.9 4.3 mA All inputs = 5 MHz square wave, CL = 15 pF; VDD = 2.70 V 20
Si8422Bx VDD1 Supply Current 100 Mbps (2.70 V) 4.6 5.8 mA All inputs = 50 MHz square wave, CL = 15 pF; VDD = 2.70 V 20
Si8422Bx VDD2 Supply Current 100 Mbps (2.70 V) 4.6 5.8 mA All inputs = 50 MHz square wave, CL = 15 pF; VDD = 2.70 V 20
Output Impedance ZO 50 Ω 10
Peak Eye Diagram Jitter tJIT(PK) 350 ps See Figure 3.3 Eye Diagram 13

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing abs • SOIC-8 narrow body silabs.com / Smart. Connected. Energy-friendly. Rev. 1.4 1

CAD (KiCad official)

  • Symbol: SI8422BB-D-ISR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: si8422bb-d-isr-etched.step / si8422bb-d-isr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); si8422bb-d-isr.step / si8422bb-d-isr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: SILICON LABS datasheet (37 pp, sha256 5f2a90f423e077b9, retrieved 2026-10-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF