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SI8233BD-D-ISR

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SKYWORKS SILICON LABS Digital Isolators, SOIC-16-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SI8233BD-D-ISR

SKYWORKS SILICON LABS · Digital Isolators · SOIC-16-300mil

SI8233BD-D-ISR from SKYWORKS SILICON LABS, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIA input Non-inverting logic input terminal for Driver A (TTL-compatible, >400 mV hysteresis).
2 VIB input Non-inverting logic input terminal for Driver B (TTL-compatible, >400 mV hysteresis).
3 VDDI power_in Input-side power supply terminal; connect to a source of 4.5 to 5.5 V.
4 GNDI power_in Input-side ground terminal.
5 DISABLE input When high, unconditionally drives outputs VOA and VOB LOW; it should be tied to external logic level to avoid erroneous operation from capacitive noise coupling.
6 DT input Dead time programming input; the resistor from DT to ground sets the dead time between VOA and VOB transitions, defaulting to 400 ps when tied to VDDI or left open.
7 NC unconnected No connection.
8 VDDI power_in Input-side power supply terminal; connect to a source of 4.5 to 5.5 V.
9 GNDB power_in Ground terminal for Driver B.
10 VOB output Driver B output (low-side driver).
11 VDDB power_in Driver B power supply voltage terminal; connect to a source of 6.5 to 24 V.
12 NC unconnected No connection.
13 NC unconnected No connection.
14 GNDA power_in Ground terminal for Driver A.
15 VOA output Driver A output (high-side driver).
16 VDDA power_in Driver A power supply voltage terminal; connect to a source of 6.5 to 24 V.

Key specifications

Parameter Value
Manufacturer SKYWORKS SILICON LABS
Package SOIC-16-300mil
Category Signal Isolation Devices
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Driver supply voltage VDDA, VDDB 6.5 24 V Voltage between VDDA and GNDA, and VDDB and GNDB 24
Input-side power supply voltage VDDI 4.5 5.5 V Si8230/1/2/3/4/5 24
VDDI undervoltage threshold (rising) VDDIUV+ 3.6 4 4.45 V VDDI rising (Si8230/1/2/3/4/5) 25
VDDI undervoltage threshold (falling) VDDIUV- 3.3 3.7 4.15 V VDDI falling (Si8230/1/2/3/4/5) 25
VDDA, VDDB undervoltage threshold (rising), 8 V threshold VDDAUV+, VDDBUV+ 7.5 8.6 9.4 V VDDA, VDDB rising; 8 V Threshold 25
VDDA, VDDB undervoltage threshold (falling), 8 V threshold VDDAUV-, VDDBUV- 7.2 8.1 8.7 V VDDA, VDDB falling; 8 V Threshold 25
Logic high output voltage VOAH, VOBH 0.04 V IOA, IOB = -1 mA (VDDA / VDDB) 24
Logic low output voltage VOAL, VOBL 0.04 V IOA, IOB = 1 mA 24
Logic low input threshold VIL 0.8 V 24
Logic high input threshold VIH 2 V 24
Input hysteresis VIHYST 400 450 mV Si8230/1/2/3/4/5/7/8 24
Input supply quiescent current IDDI(Q) 2 3 mA Si8230/2/3/5/7/8 24
Output supply quiescent current IDDA(Q), IDDB(Q) 3 mA Current per channel 24
Input pin leakage current IVIA, IVIB, IPWM -10 10 µA dc 24
Input pin leakage current (DISABLE) IDISABLE -10 10 µA dc Si8230/1/2/3/4/5 24
Propagation delay tPHL, tPLH 30 45 ns CL = 200 pF 25
Pulse width distortion PWD 5.6 ns 25
Absolute maximum input-side supply voltage VDDI -0.6 6 V 32
Absolute maximum driver-side supply voltage VDDA, VDDB -0.6 30 V 32
Voltage on any pin with respect to ground VIO -0.5 V Maximum printed as VDD + 0.5 V 32
Output voltage to GND (repetitive spike) VOA to GNDA, VOB to GNDB -2 V Repeat spike of -2 V for 200 ns, 200 kHz; maximum printed as VDDA/B + 0.5 V 32
Peak output current (4.0 A versions) IOPK 4 A tPW = 10 µs, duty cycle = 0.2% 32
Storage temperature TSTG -65 150 °C 32
Ambient temperature under bias TA -40 125 °C 32
Junction temperature TJ 150 °C 32
Lead solder temperature 260 °C 10 s 32
Maximum isolation, input to output (WB SOIC) 6500 VRMS 1 s, WB SOIC 32
Maximum isolation, output to output (WB SOIC) 2500 VRMS 1 s, WB SOIC 32
VDE safety limiting case temperature TS 150 °C VDE 0884-10 safety limiting values (WB SOIC-14/16) 31
VDE safety input current IS 50 mA θJA = 100 °C/W (WB SOIC-14/16); VDDI = 5.5 V, VDDA = VDDB = 24 V, TJ = 150 °C, TA = 25 °C 31
VDE device power dissipation PD 1.2 W Table note 2: VDDI = 5.5 V, VDDA = VDDB = 24 V, TJ = 150 °C 31
IC junction-to-air thermal resistance (WB SOIC-14/16) θJA 100 °C/W WB SOIC-14/16 31

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing PC 4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body Components. 45

CAD (KiCad official)

  • Symbol: SI8233BD-D-ISR
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16-300mil (KiCad packages3D, STEP)
  • 3D model files: si8233bd-d-isr-etched.step / si8233bd-d-isr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); si8233bd-d-isr.step / si8233bd-d-isr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: SKYWORKS SILICON LABS datasheet (58 pp, sha256 ad26a637f019976a, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF