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SI7860DP-T1-GE3-VB

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VBsemi Elec MOSFETs, DFN5x6-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SI7860DP-T1-GE3-VB

VBsemi Elec · MOSFETs · DFN5x6-8

SI7860DP-T1-GE3-VB from VBsemi Elec, in a DFN5x6-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S passive Source terminal of the N-channel MOSFET; gate-source voltage is referenced to it with VGS limited to ±20 V.
2 S passive Source terminal of the N-channel MOSFET; gate-source voltage is referenced to it with VGS limited to ±20 V.
3 S passive Source terminal of the N-channel MOSFET; gate-source voltage is referenced to it with VGS limited to ±20 V.
4 G input Gate terminal of the N-channel MOSFET; gate-source voltage is limited to ±20 V (VGS).
5 D passive Drain terminal of the N-channel MOSFET; drain-source voltage is rated 30 V (VDS).
6 D passive Drain terminal of the N-channel MOSFET; drain-source voltage is rated 30 V (VDS).
7 D passive Drain terminal of the N-channel MOSFET; drain-source voltage is rated 30 V (VDS).
8 D passive Drain terminal of the N-channel MOSFET; drain-source voltage is rated 30 V (VDS).
9 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer VBsemi Elec
Package DFN5x6-8
Category Triode/MOS Tube/Transistor
Pins 9

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Breakdown Voltage VDS 30 V VGS = 0 V, ID = 250 µA 2
Gate-Source Threshold Voltage VGS(th) 0.5 2 V VDS = VGS, ID = 250 µA 2
Gate-Source Leakage IGSS -100 100 nA VDS = 0 V, VGS = ± 20 V 2
Zero Gate Voltage Drain Current IDSS 1 µA VDS = 30 V, VGS = 0 V 2
Zero Gate Voltage Drain Current (TJ = 55 °C) IDSS 10 µA VDS = 30 V, VGS = 0 V, TJ = 55 °C 2
On-State Drain Current ID(on) 90 A VDS 5 V, VGS = 10 V 2
Drain-Source On-State Resistance RDS(on) 0.007 Ω VGS = 10 V, ID = 30.8 A 2
Drain-Source On-State Resistance RDS(on) 0.009 Ω VGS = 4.5 V, ID = 27 A 2
Gate Resistance Rg 1.4 2.1 Ω f = 1 MHz 2
Turn-On Delay Time (VGEN 10 V) td(on) 18 27 ns VDD = 15 V, RL = 0.625, ID = 24 A, VGEN = 10 V, Rg = 1 2
Rise Time (VGEN 10 V) tr 11 17 ns VDD = 15 V, RL = 0.625, ID = 24 A, VGEN = 10 V, Rg = 1 2
Turn-Off Delay Time (VGEN 10 V) td(off) 70 105 ns VDD = 15 V, RL = 0.625, ID = 24 A, VGEN = 10 V, Rg = 1 2
Fall Time (VGEN 10 V) tf 10 15 ns VDD = 15 V, RL = 0.625, ID = 24 A, VGEN = 10 V, Rg = 1 2
Turn-On Delay Time (VGEN 4.5 V) td(on) 55 83 ns VDD = 15 V, RL = 0.67, ID = 22.5 A, VGEN = 4.5 V, Rg = 1 2
Rise Time (VGEN 4.5 V) tr 180 270 ns VDD = 15 V, RL = 0.67, ID = 22.5 A, VGEN = 4.5 V, Rg = 1 2
Turn-Off Delay Time (VGEN 4.5 V) td(off) 55 83 ns VDD = 15 V, RL = 0.67, ID = 22.5 A, VGEN = 4.5 V, Rg = 1 2
Fall Time (VGEN 4.5 V) tf 12 18 ns VDD = 15 V, RL = 0.67, ID = 22.5 A, VGEN = 4.5 V, Rg = 1 2
Body Diode Voltage VSD 0.8 1.2 V IS = 22 A 2
Body Diode Reverse Recovery Time trr 52 78 ns IF = 20 A, di/dt = 100 A/µs, TJ = 25 °C 2
Body Diode Reverse Recovery Charge Qrr 70.2 105 nC IF = 20 A, di/dt = 100 A/µs, TJ = 25 °C 2
Drain-Source Voltage VDS 30 V 1
Gate-Source Voltage VGS -20 20 V 1
Pulsed Drain Current IDM 210 A 1
Avalanche Current Pulse IAS 60 A L = 0.1 mH 1
Single Pulse Avalanche Energy EAS 95 mJ 1
Maximum Power Dissipation PD 155 W TC = 25 °C 1
Maximum Power Dissipation PD 105 W TC = 70 °C 1
Operating Junction and Storage Temperature Range TJ, Tstg -55 175 °C 1
Maximum Junction-to-Ambient (t ≤ 10 sec) RthJA 32 40 °C/W t 10 sec 1
Maximum Junction-to-Ambient (steady state) RthJA 90 °C/W steady state (note d) 1
Maximum Junction-to-Case (steady state) RthJC 0.5 0.6 °C/W steady state 1

CAD (KiCad official)

  • Symbol: SI7860DP-T1-GE3-VB
  • Footprint: Package_DFN_QFN:DFN-S-8-1EP_6x5mm_P1.27mm
  • 3D model: DFN5x6-8 (KiCad packages3D, STEP)
  • 3D model files: si7860dp-t1-ge3-vb-etched.step / si7860dp-t1-ge3-vb-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); si7860dp-t1-ge3-vb.step / si7860dp-t1-ge3-vb.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: VBsemi Elec datasheet (7 pp, sha256 f42fa41bbd7389c2, retrieved 2026-10-29, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF