component

Si7850DP

Public Made by Adom

by adom

XBLW MOSFETs, DFN5x6-8L. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componenttransistors-thyristorssi7850dpfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 23d ago
viewers si7850dp: viewers · Ray 23d ago
package.json Publish 0.1.0 · Ray 23d ago
page.json Set visibility: public · Ray 23d ago
README.md Publish 0.1.0 · Ray 23d ago
si7850dp-etched.glb Publish 0.1.0 · Ray 23d ago
si7850dp-etched.step si7850dp: factory component page (tier=lcsc) · Ray 23d ago
si7850dp-hero.glb si7850dp: hero GLB from the etched model (keeps the MPN mark) · Ray 23d ago
si7850dp-hero.overlay.json Publish 0.1.0 · Ray 23d ago
si7850dp.glb Publish 0.1.0 · Ray 23d ago
si7850dp.kicad_mod Publish 0.1.0 · Ray 23d ago
si7850dp.kicad_sym Publish 0.1.0 · Ray 23d ago
si7850dp.lbr Publish 0.1.0 · Ray 23d ago
si7850dp.step Publish 0.1.0 · Ray 23d ago

Si7850DP

XBLW · MOSFETs · DFN5x6-8L

Si7850DP from XBLW, in a DFN5x6-8L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S passive Source terminal of the N-channel MOSFET (continuous source current up to 30 A, pulsed 46 A).
2 S passive Source terminal of the N-channel MOSFET, tied to the source pins 1 and 3.
3 S passive Source terminal of the N-channel MOSFET, tied to the source pins 1 and 2.
4 G input Gate terminal; gate-source voltage is rated ±20 V with threshold 1.2 V min to 2.5 V max, and drive down to 4.5 V is specified.
5 D passive Drain terminal; drain-source voltage rated 60 V and continuous drain current 30 A at TC=25℃.
6 D passive Drain terminal, tied to the other drain pins and the drain pad (VDS max 60 V).
7 D passive Drain terminal, tied to the other drain pins and the drain pad (VDS max 60 V).
8 D passive Drain terminal, tied to the other drain pins and the drain pad (VDS max 60 V).
9 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer XBLW
Package DFN5x6-8L
Category Transistors/Thyristors
Pins 9

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDS 60 V 2
Gate-Source Voltage VGS -20 20 V 2
Continuous Drain Current ID 30 A TC=25℃, VGS=10V 2
Continuous Drain Current ID 15 A TC=100℃, VGS=10V 2
Pulsed Drain Current IDM 46 A 2
Single Pulse Avalanche Energy EAS 25.5 mJ 2
Avalanche Current IAS 22.6 A 2
Total Power Dissipation PD 34.7 W TC=25℃ 2
Storage Temperature Range TSTG -55 150 ℃ 2
Operating Junction Temperature Range TJ -55 150 ℃ 2
Thermal Resistance Junction-ambient RθJA 62 ℃/W Surface mounted on 1 inch2 FR-4 board, 2OZ copper (note 1) 2
Thermal Resistance Junction-Case RθJC 3.6 ℃/W Note 1 2
Drain-Source Breakdown Voltage BVDSS 60 V VGS=0V, ID=250uA 3
Static Drain-Source On-Resistance RDS(ON) 25 mΩ VGS=10V, ID=15A 3
Static Drain-Source On-Resistance RDS(ON) 20 24 mΩ VGS=4.5V, ID=10A 3
Gate Threshold Voltage VGS(th) 1.2 2.5 V VGS=VDS, ID=250uA 3
Drain-Source Leakage Current IDSS 1 uA VDS=48V, VGS=0V, TJ=25℃ 3
Drain-Source Leakage Current IDSS 5 uA VDS=48V, VGS=0V, TJ=55℃ 3
Gate-Source Leakage Current IGSS -100 100 nA VGS=±20V, VDS=0V 3
Continuous Source Current IS 30 A VG=VD=0V, Force Current 3
Pulsed Source Current ISM 46 A 3
Diode Forward Voltage VSD 1.2 V VGS=0V, IS=1A, TJ=25℃ 3

CAD (KiCad official)

  • Symbol: Si7850DP
  • Footprint: Package_DFN_QFN:DFN-S-8-1EP_6x5mm_P1.27mm
  • 3D model: DFN5x6-8L (KiCad packages3D, STEP)
  • 3D model files: si7850dp-etched.step / si7850dp-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); si7850dp.step / si7850dp.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: XBLW datasheet (7 pp, sha256 e29892a96223552c, retrieved 2026-10-15, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF