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Ray Publish 0.1.0 3227aaa 24d ago

SI7850DP-T1-E3-VB

VBsemi Elec · MOSFETs · DFN-8(5x6)

SI7850DP-T1-E3-VB from VBsemi Elec, in a DFN-8(5x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S passive Source terminal of the N-channel MOSFET (pin 1, marked by the dot on the top view).
2 S passive Source terminal of the N-channel MOSFET.
3 S passive Source terminal of the N-channel MOSFET.
4 G input Gate terminal of the N-channel MOSFET; VGS is rated at ±20 V.
5 D passive Drain terminal of the N-channel MOSFET; VDS is rated at 60 V.
6 D passive Drain terminal of the N-channel MOSFET; VDS is rated at 60 V.
7 D passive Drain terminal of the N-channel MOSFET; VDS is rated at 60 V.
8 D passive Drain terminal of the N-channel MOSFET; VDS is rated at 60 V.
9 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer VBsemi Elec
Package DFN-8(5x6)
Category Transistors/Thyristors
Pins 9

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-source voltage VDS 60 V 1
Gate-source voltage VGS -20 20 V 1
Continuous drain current ID 15 A TC = 25 °C (TJ = 150 °C) 1
Continuous drain current ID 9 A TC = 70 °C 1
Continuous drain current ID 10.3 A TA = 25 °C (notes b, c) 1
Continuous drain current ID 8.1 A TA = 70 °C (notes b, c) 1
Pulsed drain current IDM 40 A t = 100 μs 1
Continuous source-drain diode current IS 12 A TC = 25 °C 1
Continuous source-drain diode current IS 3 A TA = 25 °C (notes b, c) 1
Single pulse avalanche current IAS 15 A L = 0.1 mH 1
Single pulse avalanche energy EAS 11.3 mJ 1
Maximum power dissipation PD 35.7 W TC = 25 °C 1
Maximum power dissipation PD 22.9 W TC = 70 °C 1
Maximum power dissipation PD 3.6 W TA = 25 °C (notes b, c) 1
Maximum power dissipation PD 2.3 W TA = 70 °C (notes b, c) 1
Operating junction and storage temperature range TJ, Tstg -55 150 °C 1
Soldering recommendations (peak temperature) 260 °C t = 10 s (note c) 1
Maximum junction-to-ambient RthJA 25 35 °C/W t ≤ 10 s (note b) 1
Drain-source breakdown voltage VDS 60 V VGS = 0 V, ID = 250 μA 2
Gate-source threshold voltage VGS(th) 1 2.8 V VDS = VGS, ID = 250 μA 2
Gate-source leakage IGSS 100 nA VDS = 0 V, VGS = ± 20 V 2
Zero gate voltage drain current IDSS 1 μA VDS = 60 V, VGS = 0 V 2
Zero gate voltage drain current IDSS 10 μA VDS = 60 V, VGS = 0 V, TJ = 70 °C 2
On-state drain current ID(on) 10 A VDS 5 V, VGS = 10 V 2
Drain-source on-state resistance RDS(on) 0.024 Ω VGS = 10 V, ID = 10 A 2
Drain-source on-state resistance RDS(on) 0.028 Ω VGS = 4.5 V, ID = 5 A 2
Total gate charge Qg 11.1 17 nC VDS = 30 V, VGS = 10 V, ID = 5 A 2
Turn-on rise time tr 21 40 ns 2
Turn-off delay time td(off) 10 20 ns 2
Fall time tf 10 20 ns 2
Rise time (VGEN = 4.5 V) tr 25 50 ns 2
Turn-off delay time (VGEN = 4.5 V) td(off) 10 20 ns 2
Fall time (VGEN = 4.5 V) tf 22 45 ns 2
Continuous source-drain diode current IS 15 A TC = 25 °C 2
Pulse diode forward current ISM 40 A 2
Body diode voltage VSD 0.79 1.2 V IS = 5 A, VGS = 0 V 2
Body diode reverse recovery time trr 30 60 ns IF = 5 A, di/dt = 100 A/μs, TJ = 25 °C 2
Body diode reverse recovery charge Qrr 60 120 nC 2
VGS(th) temperature coefficient VGS(th)/TJ -4.8 mV/°C 2
Gate resistance Rg 0.1 0.6 1.2 Ω f = 1 MHz 2
Input capacitance Ciss 790 pF VDS = 30 V, VGS = 0 V, f = 1 MHz 2
Output capacitance Coss 330 pF 2
Reverse transfer capacitance Crss 14 pF 2
Gate-source charge Qgs 2.2 nC 2
Gate-drain charge Qgd 1.1 nC 2
Forward transconductance gfs 39 S VDS = 10 V, ID = 10 A 2
Body diode reverse recovery fall time ta 15 ns 2
Body diode reverse recovery rise time tb 15 ns 2

CAD (KiCad official)

  • Symbol: SI7850DP-T1-E3-VB
  • Footprint: Package_DFN_QFN:DFN-S-8-1EP_6x5mm_P1.27mm
  • 3D model: DFN-8(5x6) (KiCad packages3D, STEP)
  • 3D model files: si7850dp-t1-e3-vb-etched.step / si7850dp-t1-e3-vb-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); si7850dp-t1-e3-vb.step / si7850dp-t1-e3-vb.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: VBsemi Elec datasheet (7 pp, sha256 71d6677c08dfd876, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF