component
SI7463DP-VB
Public Made by Adomby adom
VBsemi Elec MOSFETs, DFN5x6-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 11d ago |
| viewers | 11d ago |
| package.json | 11d ago |
| page.json | 11d ago |
| README.md | 11d ago |
| si7463dp-vb-etched.glb | 11d ago |
| si7463dp-vb-etched.step | 11d ago |
| si7463dp-vb-hero.glb | 11d ago |
| si7463dp-vb-hero.overlay.json | 11d ago |
| si7463dp-vb.glb | 11d ago |
| si7463dp-vb.kicad_mod | 11d ago |
| si7463dp-vb.kicad_sym | 11d ago |
| si7463dp-vb.lbr | 11d ago |
| si7463dp-vb.step | 11d ago |
SI7463DP-VB
VBsemi Elec · MOSFETs · DFN5x6-8
SI7463DP-VB from VBsemi Elec, in a DFN5x6-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source terminal of the P-channel MOSFET, tied to pins 2 and 3; drain-source voltage rating is -40 V. |
| 2 | S | passive | Source terminal of the P-channel MOSFET, tied to pins 1 and 3; continuous drain current rating is -40 A at TC = 25 °C. |
| 3 | S | passive | Source terminal of the P-channel MOSFET, tied to pins 1 and 2; continuous source-drain diode current is -35 A at TC = 25 °C. |
| 4 | G | input | Gate terminal of the P-channel MOSFET; gate-source voltage limit is ±20 V and threshold voltage is -1.2 to -2.3 V. |
| 5 | D | passive | Drain terminal of the P-channel MOSFET, tied to pins 6, 7 and 8; RDS(on) is 0.010 ohm at VGS = -10 V. |
| 6 | D | passive | Drain terminal of the P-channel MOSFET, tied to pins 5, 7 and 8; pulsed drain current is -70 A. |
| 7 | D | passive | Drain terminal of the P-channel MOSFET, tied to pins 5, 6 and 8; RDS(on) is 0.012 ohm at VGS = -4.5 V. |
| 8 | D | passive | Drain terminal of the P-channel MOSFET, tied to pins 5, 6 and 7; drain-source voltage rating is -40 V. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | VBsemi Elec |
| Package | DFN5x6-8 |
| Category | Transistors/Thyristors |
| Pins | 9 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | d. The DFN5x6 is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cann | 1 |
CAD (KiCad official)
- Symbol:
SI7463DP-VB - Footprint:
Package_DFN_QFN:DFN-S-8-1EP_6x5mm_P1.27mm - 3D model: DFN5x6-8 (KiCad packages3D, STEP)
- 3D model files:
si7463dp-vb-etched.step/si7463dp-vb-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);si7463dp-vb.step/si7463dp-vb.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: VBsemi Elec datasheet (9 pp, sha256
6ed9a16c396e794b, retrieved 2026-10-28, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).