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SI7172DP-T1-GE3-VB

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VBsemi Elec MOSFETs, DFN-8L(5x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SI7172DP-T1-GE3-VB

VBsemi Elec · MOSFETs · DFN-8L(5x6)

SI7172DP-T1-GE3-VB from VBsemi Elec, in a DFN-8L(5x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S passive Source terminal of the N-channel MOSFET; VDS rated 200 V.
2 S passive Source terminal of the N-channel MOSFET, tied with pins 1 and 3.
3 S passive Source terminal of the N-channel MOSFET, tied with pins 1 and 2.
4 G input Gate terminal; VGS rated ±20 V, RDS(on) specified at VGS = 10 V and 7.5 V.
5 D passive Drain terminal; continuous drain current 30 A at TC = 25 °C.
6 D passive Drain terminal, tied with pins 5, 7 and 8.
7 D passive Drain terminal, tied with pins 5, 6 and 8.
8 D passive Drain terminal, tied with pins 5, 6 and 7.
9 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer VBsemi Elec
Package DFN-8L(5x6)
Category Triode/MOS Tube/Transistor
Pins 9

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-source voltage VDS 200 V 1
Gate-source voltage VGS -20 20 V 1
Continuous drain current ID 30 A TC = 25 °C (TJ = 150 °C) 1
Continuous drain current ID 23 A TC = 70 °C (TJ = 150 °C) 1
Continuous drain current ID 7.6 A TA = 25 °C (notes b, c) 1
Continuous drain current ID 5.9 A TA = 70 °C (notes b, c) 1
Pulsed drain current IDM 70 A t = 100 μs 1
Continuous source-drain diode current IS 30 A TC = 25 °C 1
Continuous source-drain diode current IS 5.6 A TA = 25 °C (notes b, c) 1
Single pulse avalanche current IAS 30 A L = 0.1 mH 1
Single pulse avalanche energy EAS 45 mJ 1
Maximum power dissipation PD 6.25 W TA = 25 °C (notes b, c) 1
Maximum power dissipation PD 4 W TA = 70 °C (notes b, c) 1
Operating junction and storage temperature range TJ, Tstg -55 150 °C 1
Soldering recommendations (peak temperature) 260 °C peak temperature (note c) 1
Gate-source threshold voltage VGS(th) 2 4 V VDS = VGS, ID = 250 μA 2
Drain-source breakdown voltage VDS 200 V VGS = 0 V, ID = 250 μA 2
Gate-source leakage IGSS 100 nA VDS = 0 V, VGS = ±20 V 2
Zero gate voltage drain current IDSS 1 μA VDS = 200 V, VGS = 0 V 2
Zero gate voltage drain current IDSS 15 μA VDS = 200 V, VGS = 0 V, TJ = 70 °C 2
On-state drain current ID(on) 30 A VDS ≥ 10 V, VGS = 10 V 2
Gate resistance Rg 0.6 2.1 4 Ω f = 1 MHz 2
Total gate charge Qg 25 38 nC VDS = 100 V, VGS = 10 V, ID = 10 A 2
Total gate charge Qg 20 30 nC VDS = 100 V, VGS = 7.5 V, ID = 10 A 2
Turn-on rise time tr 20 40 ns VDD = 100 V, RL = 10 Ω, ID 10 A, VGEN = 10 V, Rg = 1 Ω 2
Turn-off delay time td(off) 20 40 ns VDD = 100 V, RL = 10 Ω, ID 10 A, VGEN = 10 V, Rg = 1 Ω 2
Fall time tf 24 48 ns VDD = 100 V, RL = 10 Ω, ID 10 A, VGEN = 10 V, Rg = 1 Ω 2
Rise time tr 27 54 ns VDD = 100 V, RL = 10 Ω, ID 10 A, VGEN = 7.5 V, Rg = 1 Ω 2
Turn-off delay time td(off) 18 36 ns VDD = 100 V, RL = 10 Ω, ID 10 A, VGEN = 7.5 V, Rg = 1 Ω 2
Turn-on delay time td(on) 11 22 ns VDD = 100 V, RL = 10 Ω, ID 10 A, VGEN = 7.5 V, Rg = 1 Ω 2
Continuous source-drain diode current IS 35.4 A TC = 25 °C 2
Pulse diode forward current ISM 80 A 2
Body diode voltage VSD 0.77 1.1 V IS = 5 A, VGS = 0 V 2
Body diode reverse recovery time trr 100 200 ns IF = 10 A, dI/dt = 100 A/μs, TJ = 25 °C 2
Body diode reverse recovery charge Qrr 400 800 nC IF = 10 A, dI/dt = 100 A/μs, TJ = 25 °C 2
Maximum junction-to-ambient RthJA 15 20 °C/W t ≤ 10 s, surface mounted on 1" x 1" FR4 board 1
Maximum junction-to-ambient (steady state) RthJA 54 °C/W steady state (note f) 1
VDS temperature coefficient ΔVDS/ΔTJ 173 mV/°C ID = 10 mA 2
VGS(th) temperature coefficient ΔVGS(th)/ΔTJ -7.1 mV/°C ID = 250 μA 2
Drain-source on-state resistance RDS(on) 0.038 Ω VGS = 10 V, ID = 10 A 2
Drain-source on-state resistance RDS(on) 0.043 Ω VGS = 7.5 V, ID = 10 A 2
Forward transconductance gfs 27 S VDS = 15 V, ID = 10 A 2
Input capacitance Ciss 1380 pF VDS = 100 V, VGS = 0 V, f = 1 MHz 2
Output capacitance Coss 142 pF VDS = 100 V, VGS = 0 V, f = 1 MHz 2
Reverse transfer capacitance Crss 11 pF VDS = 100 V, VGS = 0 V, f = 1 MHz 2
Gate-source charge Qgs 6.4 nC 2
Gate-drain charge Qgd 6.8 nC 2
Output charge Qoss 52 nC VDS = 100 V, VGS = 0 V 2
Reverse recovery fall time ta 80 ns 2
Reverse recovery rise time tb 20 ns 2

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts copper d. The DFN5X 6X is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process 1

CAD (KiCad official)

  • Symbol: SI7172DP-T1-GE3-VB
  • Footprint: Package_DFN_QFN:DFN-S-8-1EP_6x5mm_P1.27mm
  • 3D model: DFN-8L(5x6) (KiCad packages3D, STEP)
  • 3D model files: si7172dp-t1-ge3-vb-etched.step / si7172dp-t1-ge3-vb-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); si7172dp-t1-ge3-vb.step / si7172dp-t1-ge3-vb.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: VBsemi Elec datasheet (8 pp, sha256 680f9c543fcbb7a4, retrieved 2026-10-29, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF