component
SI6954ADQ-T1-E3
Public Made by Adomby adom
Vishay Intertech MOSFETs, TSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SI6954ADQ-T1-E3
Vishay Intertech · MOSFETs · TSSOP-8
SI6954ADQ-T1-E3 from Vishay Intertech, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | D1 | passive | Drain of N-channel MOSFET 1; the datasheet rates drain-source voltage VDS at 30 V. |
| 2 | S1 | passive | Source of N-channel MOSFET 1, sharing the same pad-side connection as pin 3; the datasheet rates drain-source voltage VDS at 30 V. |
| 3 | S1 | passive | Source of N-channel MOSFET 1, internally paired with pin 2; the datasheet rates drain-source voltage VDS at 30 V. |
| 4 | G1 | input | Gate of N-channel MOSFET 1; the datasheet rates gate-source voltage at ±20 V and specifies RDS(on) at VGS = 4.5 V and 10 V. |
| 5 | G2 | input | Gate of N-channel MOSFET 2; the datasheet rates gate-source voltage at ±20 V and specifies RDS(on) at VGS = 4.5 V and 10 V. |
| 6 | S2 | passive | Source of N-channel MOSFET 2, internally paired with pin 7; the datasheet rates drain-source voltage VDS at 30 V. |
| 7 | S2 | passive | Source of N-channel MOSFET 2, internally paired with pin 6; the datasheet rates drain-source voltage VDS at 30 V. |
| 8 | D2 | passive | Drain of N-channel MOSFET 2; the datasheet rates drain-source voltage VDS at 30 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Vishay Intertech |
| Package | TSSOP-8 |
| Category | Triode/MOS Tube/Transistor |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Gate Threshold Voltage | VGS(th) | 1 | V | VDS = VGS, ID = 250 µA | 2 | ||
| Gate-Body Leakage | IGSS | 100 | nA | VDS = 0 V, VGS = ± 20 V | 2 | ||
| Zero Gate Voltage Drain Current | IDSS | 1 | µA | VDS = 30 V, VGS = 0 V | 2 | ||
| Zero Gate Voltage Drain Current | IDSS | 10 | µA | VDS = 30 V, VGS = 0 V, TJ = 55 °C | 2 | ||
| On-State Drain Current | ID(on) | 20 | A | VDS ≥ 5 V, VGS = 10 V | 2 | ||
| Drain-Source On-State Resistance | RDS(on) | 0.044 | 0.053 | Ω | VGS = 10 V, ID = 3.4 A | 2 | |
| Drain-Source On-State Resistance | RDS(on) | 0.062 | 0.075 | Ω | VGS = 4.5 V, ID = 2.9 A | 2 | |
| Diode Forward Voltage | VSD | 0.8 | 1.2 | V | IS = 0.83 A, VGS = 0 V | 2 | |
| Total Gate Charge | Qg | 8 | 16 | nC | VDS = 10 V, VGS = 10 V, ID = 3.4 A | 2 | |
| Turn-On Delay Time | td(on) | 12 | 20 | ns | VDD = 10 V, RL = 10 Ω, ID ≅ 1 A, VGEN = 10 V, RG = 6 Ω | 2 | |
| Rise Time | tr | 10 | 20 | ns | VDD = 10 V, RL = 10 Ω, ID ≅ 1 A, VGEN = 10 V, RG = 6 Ω | 2 | |
| Turn-Off Delay Time | td(off) | 23 | 45 | ns | VDD = 10 V, RL = 10 Ω, ID ≅ 1 A, VGEN = 10 V, RG = 6 Ω | 2 | |
| Fall Time | tf | 8 | 15 | ns | VDD = 10 V, RL = 10 Ω, ID ≅ 1 A, VGEN = 10 V, RG = 6 Ω | 2 | |
| Source-Drain Reverse Recovery Time | trr | 25 | 40 | ns | IF = 0.83 A, dI/dt = 100 A/µs | 2 | |
| Drain-Source Voltage | VDS | 30 | V | 1 | |||
| Gate-Source Voltage | VGS | -20 | 20 | V | 1 | ||
| Continuous Drain Current | ID | 3.4 | A | TJ = 150 °C, TA = 25 °C, t ≤ 10 s | 1 | ||
| Continuous Drain Current | ID | 3.1 | A | TJ = 150 °C, TA = 25 °C, steady state | 1 | ||
| Continuous Drain Current | ID | 2.7 | A | TJ = 150 °C, TA = 70 °C, t ≤ 10 s | 1 | ||
| Continuous Drain Current | ID | 2.5 | A | TJ = 150 °C, TA = 70 °C, steady state | 1 | ||
| Pulsed Drain Current | IDM | 20 | A | 10 µs pulse width | 1 | ||
| Continuous Source Current (Diode Conduction) | IS | 0.83 | A | t ≤ 10 s | 1 | ||
| Continuous Source Current (Diode Conduction) | IS | 0.69 | A | steady state | 1 | ||
| Maximum Power Dissipation | PD | 1 | W | TA = 25 °C, t ≤ 10 s | 1 | ||
| Maximum Power Dissipation | PD | 0.83 | W | TA = 25 °C, steady state | 1 | ||
| Maximum Power Dissipation | PD | 0.96 | W | TA = 70 °C, t ≤ 10 s | 1 | ||
| Maximum Power Dissipation | PD | 0.53 | W | TA = 70 °C, steady state | 1 | ||
| Operating Junction and Storage Temperature Range | TJ, Tstg | -55 | 150 | °C | 1 | ||
| Maximum Junction-to-Ambient | RthJA | 90 | 125 | °C/W | t ≤ 10 s | 1 | |
| Maximum Junction-to-Ambient | RthJA | 126 | 150 | °C/W | steady state | 1 | |
| Maximum Junction-to-Foot (Drain) | RthJF | 65 | 80 | °C/W | steady state | 1 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | overlies the drain pins. The copper plane connects the drain pins | 8 |
CAD (KiCad official)
- Symbol:
SI6954ADQ-T1-E3 - Footprint:
Package_SO:TSSOP-8_4.4x3mm_P0.65mm - 3D model: TSSOP-8 (KiCad packages3D, STEP)
- 3D model files:
si6954adq-t1-e3-etched.step/si6954adq-t1-e3-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);si6954adq-t1-e3.step/si6954adq-t1-e3.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Vishay Intertech datasheet (10 pp, sha256
feed5fb73b133a24, retrieved 2026-11-05, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SI6954ADQ-T1-E3
**Vishay Intertech** · MOSFETs · TSSOP-8
SI6954ADQ-T1-E3 from Vishay Intertech, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | D1 | passive | Drain of N-channel MOSFET 1; the datasheet rates drain-source voltage VDS at 30 V. |
| 2 | S1 | passive | Source of N-channel MOSFET 1, sharing the same pad-side connection as pin 3; the datasheet rates drain-source voltage VDS at 30 V. |
| 3 | S1 | passive | Source of N-channel MOSFET 1, internally paired with pin 2; the datasheet rates drain-source voltage VDS at 30 V. |
| 4 | G1 | input | Gate of N-channel MOSFET 1; the datasheet rates gate-source voltage at ±20 V and specifies RDS(on) at VGS = 4.5 V and 10 V. |
| 5 | G2 | input | Gate of N-channel MOSFET 2; the datasheet rates gate-source voltage at ±20 V and specifies RDS(on) at VGS = 4.5 V and 10 V. |
| 6 | S2 | passive | Source of N-channel MOSFET 2, internally paired with pin 7; the datasheet rates drain-source voltage VDS at 30 V. |
| 7 | S2 | passive | Source of N-channel MOSFET 2, internally paired with pin 6; the datasheet rates drain-source voltage VDS at 30 V. |
| 8 | D2 | passive | Drain of N-channel MOSFET 2; the datasheet rates drain-source voltage VDS at 30 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Vishay Intertech |
| Package | TSSOP-8 |
| Category | Triode/MOS Tube/Transistor |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Gate Threshold Voltage | VGS(th) | 1 | | | V | VDS = VGS, ID = 250 µA | 2 |
| Gate-Body Leakage | IGSS | | | 100 | nA | VDS = 0 V, VGS = ± 20 V | 2 |
| Zero Gate Voltage Drain Current | IDSS | | | 1 | µA | VDS = 30 V, VGS = 0 V | 2 |
| Zero Gate Voltage Drain Current | IDSS | | | 10 | µA | VDS = 30 V, VGS = 0 V, TJ = 55 °C | 2 |
| On-State Drain Current | ID(on) | 20 | | | A | VDS ≥ 5 V, VGS = 10 V | 2 |
| Drain-Source On-State Resistance | RDS(on) | | 0.044 | 0.053 | Ω | VGS = 10 V, ID = 3.4 A | 2 |
| Drain-Source On-State Resistance | RDS(on) | | 0.062 | 0.075 | Ω | VGS = 4.5 V, ID = 2.9 A | 2 |
| Diode Forward Voltage | VSD | | 0.8 | 1.2 | V | IS = 0.83 A, VGS = 0 V | 2 |
| Total Gate Charge | Qg | | 8 | 16 | nC | VDS = 10 V, VGS = 10 V, ID = 3.4 A | 2 |
| Turn-On Delay Time | td(on) | | 12 | 20 | ns | VDD = 10 V, RL = 10 Ω, ID ≅ 1 A, VGEN = 10 V, RG = 6 Ω | 2 |
| Rise Time | tr | | 10 | 20 | ns | VDD = 10 V, RL = 10 Ω, ID ≅ 1 A, VGEN = 10 V, RG = 6 Ω | 2 |
| Turn-Off Delay Time | td(off) | | 23 | 45 | ns | VDD = 10 V, RL = 10 Ω, ID ≅ 1 A, VGEN = 10 V, RG = 6 Ω | 2 |
| Fall Time | tf | | 8 | 15 | ns | VDD = 10 V, RL = 10 Ω, ID ≅ 1 A, VGEN = 10 V, RG = 6 Ω | 2 |
| Source-Drain Reverse Recovery Time | trr | | 25 | 40 | ns | IF = 0.83 A, dI/dt = 100 A/µs | 2 |
| Drain-Source Voltage | VDS | | | 30 | V | | 1 |
| Gate-Source Voltage | VGS | -20 | | 20 | V | | 1 |
| Continuous Drain Current | ID | | | 3.4 | A | TJ = 150 °C, TA = 25 °C, t ≤ 10 s | 1 |
| Continuous Drain Current | ID | | | 3.1 | A | TJ = 150 °C, TA = 25 °C, steady state | 1 |
| Continuous Drain Current | ID | | | 2.7 | A | TJ = 150 °C, TA = 70 °C, t ≤ 10 s | 1 |
| Continuous Drain Current | ID | | | 2.5 | A | TJ = 150 °C, TA = 70 °C, steady state | 1 |
| Pulsed Drain Current | IDM | | | 20 | A | 10 µs pulse width | 1 |
| Continuous Source Current (Diode Conduction) | IS | | | 0.83 | A | t ≤ 10 s | 1 |
| Continuous Source Current (Diode Conduction) | IS | | | 0.69 | A | steady state | 1 |
| Maximum Power Dissipation | PD | | | 1 | W | TA = 25 °C, t ≤ 10 s | 1 |
| Maximum Power Dissipation | PD | | | 0.83 | W | TA = 25 °C, steady state | 1 |
| Maximum Power Dissipation | PD | | | 0.96 | W | TA = 70 °C, t ≤ 10 s | 1 |
| Maximum Power Dissipation | PD | | | 0.53 | W | TA = 70 °C, steady state | 1 |
| Operating Junction and Storage Temperature Range | TJ, Tstg | -55 | | 150 | °C | | 1 |
| Maximum Junction-to-Ambient | RthJA | | 90 | 125 | °C/W | t ≤ 10 s | 1 |
| Maximum Junction-to-Ambient | RthJA | | 126 | 150 | °C/W | steady state | 1 |
| Maximum Junction-to-Foot (Drain) | RthJF | | 65 | 80 | °C/W | steady state | 1 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | | overlies the drain pins. The copper plane connects the drain pins | 8 |
## CAD (KiCad official)
- Symbol: `SI6954ADQ-T1-E3`
- Footprint: `Package_SO:TSSOP-8_4.4x3mm_P0.65mm`
- 3D model: TSSOP-8 (KiCad packages3D, STEP)
- 3D model files: `si6954adq-t1-e3-etched.step` / `si6954adq-t1-e3-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `si6954adq-t1-e3.step` / `si6954adq-t1-e3.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Vishay Intertech datasheet](docs/si6954adq-t1-e3-datasheet.pdf) (10 pp, sha256 `feed5fb73b133a24`, retrieved 2026-11-05, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/si6954adq-t1-e3-datasheet.pdf)