component
SI6562CDQ-T1-BE3
Public Made by Adomby adom
Vishay Intertech MOSFETs, TSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SI6562CDQ-T1-BE3
Vishay Intertech · MOSFETs · TSSOP-8
SI6562CDQ-T1-BE3 from Vishay Intertech, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | D1 | passive | N-channel MOSFET drain (Q1); pin 1 is a drain pin that also carries the package thermal connection, and the N-channel VDS rating is 20 V. |
| 2 | S1 | passive | N-channel MOSFET source 1, which is tied to pin 3 (both S1) and is rated for the device's 20 V VDS limit. |
| 3 | S1 | passive | N-channel MOSFET source 1, which is tied to pin 2 (both S1) and is rated for the device's 20 V VDS limit. |
| 4 | G1 | input | N-channel MOSFET gate; gate-source voltage is limited to ±12 V (absolute maximum). |
| 5 | G2 | input | P-channel MOSFET gate; gate-source voltage is limited to ±12 V (absolute maximum). |
| 6 | S2 | passive | P-channel MOSFET source 2, which is tied to pin 7 (both S2) and is rated for the device's −20 V VDS limit. |
| 7 | S2 | passive | P-channel MOSFET source 2, which is tied to pin 6 (both S2) and is rated for the device's −20 V VDS limit. |
| 8 | D2 | passive | P-channel MOSFET drain (Q2); pin 8 is a drain pin that also carries the package thermal connection, and the P-channel VDS rating is −20 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Vishay Intertech |
| Package | TSSOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Breakdown Voltage (N-Ch) | VDS | 20 | V | VGS = 0 V, ID = 250 µA | 2 | ||
| Drain-Source Breakdown Voltage (P-Ch) | VDS | -20 | V | VGS = 0 V, ID = -250 µA | 2 | ||
| Gate Threshold Voltage (N-Ch) | VGS(th) | 0.6 | 1.5 | V | VDS = VGS, ID = 250 µA | 2 | |
| Gate Threshold Voltage (P-Ch) | VGS(th) | -1.5 | -0.6 | V | VDS = VGS, ID = -250 µA | 2 | |
| Gate-Body Leakage (N-Ch) | IGSS | -100 | 100 | nA | VDS = 0 V, VGS = ± 12 V | 2 | |
| Gate-Body Leakage (P-Ch) | IGSS | -100 | 100 | nA | VDS = 0 V, VGS = ± 12 V | 2 | |
| Zero Gate Voltage Drain Current (N-Ch) | IDSS | 1 | µA | VDS = 20 V, VGS = 0 V | 2 | ||
| Zero Gate Voltage Drain Current (P-Ch) | IDSS | -1 | µA | VDS = -20 V, VGS = 0 V | 2 | ||
| On-State Drain Current (N-Ch) | ID(on) | 30 | A | VDS ≥ 5 V, VGS = 4.5 V | 2 | ||
| On-State Drain Current (P-Ch) | ID(on) | -30 | A | VDS ≤ -5 V, VGS = -4.5 V | 2 | ||
| Drain-Source On-State Resistance (N-Ch, 4.5 V) | RDS(on) | 0.018 | 0.022 | Ω | VGS = 4.5 V, ID = 5.7 A | 2 | |
| Drain-Source On-State Resistance (P-Ch, -4.5 V) | RDS(on) | 0.024 | 0.03 | Ω | VGS = -4.5 V, ID = -5.1 A | 2 | |
| Drain-Source On-State Resistance (N-Ch, 2.5 V) | RDS(on) | 0.029 | 0.036 | Ω | VGS = 2.5 V, ID = 4.4 A | 2 | |
| Drain-Source On-State Resistance (P-Ch, -2.5 V) | RDS(on) | 0.036 | 0.045 | Ω | VGS = -2.5 V, ID = -4.2 A | 2 | |
| Total Gate Charge (N-Ch, 10 V) | Qg | 15 | 23 | nC | VDS = 10 V, VGS = 10 V, ID = 5.7 A | 2 | |
| Total Gate Charge (P-Ch, -10 V) | Qg | 34 | 51 | nC | VDS = -10 V, VGS = -10 V, ID = -5.1 A | 2 | |
| Total Gate Charge (N-Ch, 4.5 V) | Qg | 6.7 | 11 | nC | VDS = 10 V, VGS = 4.5 V, ID = 5.7 A | 2 | |
| Total Gate Charge (P-Ch, -4.5 V) | Qg | 17 | 30 | nC | VDS = -10 V, VGS = -4.5 V, ID = -5.1 A | 2 | |
| Turn-On Delay Time (N-Ch, VGEN 4.5 V) | td(on) | 12 | 20 | ns | VDD = 10 V, RL = 2.2 Ω, ID ≅ 4.5 A, VGEN = 4.5 V, Rg = 1 Ω | 3 | |
| Turn-On Delay Time (P-Ch, VGEN -4.5 V) | td(on) | 30 | 45 | ns | VDD = -10 V, RL = 2.4 Ω, ID ≅ -4.1 A, VGEN = -4.5 V, Rg = 1 Ω | 3 | |
| Rise Time (N-Ch, VGEN 4.5 V) | tr | 10 | 15 | ns | VDD = 10 V, RL = 2.2 Ω, ID ≅ 4.5 A, VGEN = 4.5 V, Rg = 1 Ω | 3 | |
| Rise Time (P-Ch, VGEN -4.5 V) | tr | 25 | 40 | ns | VDD = -10 V, RL = 2.4 Ω, ID ≅ -4.1 A, VGEN = -4.5 V, Rg = 1 Ω | 3 | |
| Turn-Off Delay Time (N-Ch, VGEN 4.5 V) | td(off) | 25 | 40 | ns | VDD = 10 V, RL = 2.2 Ω, ID ≅ 4.5 A, VGEN = 4.5 V, Rg = 1 Ω | 3 | |
| Turn-Off Delay Time (P-Ch, VGEN -4.5 V) | td(off) | 45 | 70 | ns | VDD = -10 V, RL = 2.4 Ω, ID ≅ -4.1 A, VGEN = -4.5 V, Rg = 1 Ω | 3 | |
| Fall Time (N-Ch, VGEN 4.5 V) | tf | 10 | 15 | ns | VDD = 10 V, RL = 2.2 Ω, ID ≅ 4.5 A, VGEN = 4.5 V, Rg = 1 Ω | 3 | |
| Fall Time (P-Ch, VGEN -4.5 V) | tf | 15 | 25 | ns | VDD = -10 V, RL = 2.4 Ω, ID ≅ -4.1 A, VGEN = -4.5 V, Rg = 1 Ω | 3 | |
| Turn-On Delay Time (N-Ch, VGEN 10 V) | td(on) | 10 | 15 | ns | VDD = 10 V, RL = 2.2 Ω, ID ≅ 4.5 A, VGEN = 10 V, Rg = 1 Ω | 3 | |
| Turn-On Delay Time (P-Ch, VGEN -10 V) | td(on) | 10 | 15 | ns | VDD = -10 V, RL = 2.4 Ω, ID ≅ -4.1 A, VGEN = -10 V, Rg = 1 Ω | 3 | |
| Rise Time (N-Ch, VGEN 10 V) | tr | 10 | 15 | ns | VDD = 10 V, RL = 2.2 Ω, ID ≅ 4.5 A, VGEN = 10 V, Rg = 1 Ω | 3 | |
| Rise Time (P-Ch, VGEN -10 V) | tr | 10 | 15 | ns | VDD = -10 V, RL = 2.4 Ω, ID ≅ -4.1 A, VGEN = -10 V, Rg = 1 Ω | 3 | |
| Turn-Off Delay Time (N-Ch, VGEN 10 V) | td(off) | 20 | 30 | ns | VDD = 10 V, RL = 2.2 Ω, ID ≅ 4.5 A, VGEN = 10 V, Rg = 1 Ω | 3 | |
| Turn-Off Delay Time (P-Ch, VGEN -10 V) | td(off) | 45 | 70 | ns | VDD = -10 V, RL = 2.4 Ω, ID ≅ -4.1 A, VGEN = -10 V, Rg = 1 Ω | 3 | |
| Fall Time (N-Ch, VGEN 10 V) | tf | 8 | 15 | ns | VDD = 10 V, RL = 2.2 Ω, ID ≅ 4.5 A, VGEN = 10 V, Rg = 1 Ω | 3 | |
| Fall Time (P-Ch, VGEN -10 V) | tf | 15 | 25 | ns | VDD = -10 V, RL = 2.4 Ω, ID ≅ -4.1 A, VGEN = -10 V, Rg = 1 Ω | 3 | |
| Body Diode Voltage (N-Ch) | VSD | 0.8 | 1.2 | V | IS = 4.5 A, VGS = 0 V | 3 | |
| Body Diode Voltage (P-Ch) | VSD | -0.8 | -1.2 | V | IS = -4.1 A, VGS = 0 V | 3 | |
| Body Diode Reverse Recovery Time (N-Ch) | trr | 15 | 30 | ns | IF = 4.5 A, dI/dt = 100 A/µs, TJ = 25 °C | 3 | |
| Body Diode Reverse Recovery Time (P-Ch) | trr | 35 | 55 | ns | IF = -4.1 A, dI/dt = -100 A/µs, TJ = 25 °C | 3 | |
| Body Diode Reverse Recovery Charge (N-Ch) | Qrr | 6 | 12 | nC | IF = 4.5 A, dI/dt = 100 A/µs, TJ = 25 °C | 3 | |
| Body Diode Reverse Recovery Charge (P-Ch) | Qrr | 21 | 35 | nC | IF = -4.1 A, dI/dt = -100 A/µs, TJ = 25 °C | 3 | |
| Drain-Source Voltage (N-Ch) | VDS | 20 | V | 1 | |||
| Drain-Source Voltage (P-Ch) | VDS | -20 | V | 1 | |||
| Gate-Source Voltage | VGS | -12 | 12 | V | 1 | ||
| Continuous Drain Current (N-Ch) | ID | 6.7 | A | TJ = 150 °C, TC = 25 °C | 1 | ||
| Continuous Drain Current (P-Ch) | ID | -6.1 | A | TJ = 150 °C, TC = 25 °C | 1 | ||
| Continuous Drain Current (N-Ch) | ID | 5.7 | A | TA = 25 °C | 1 | ||
| Continuous Drain Current (P-Ch) | ID | -5.1 | A | TA = 25 °C | 1 | ||
| Pulsed Drain Current (N-Ch) | IDM | 30 | A | 1 | |||
| Pulsed Drain Current (P-Ch) | IDM | -30 | A | 1 | |||
| Source Drain Current Diode Current (N-Ch) | IS | 1.3 | A | TC = 25 °C | 1 | ||
| Source Drain Current Diode Current (P-Ch) | IS | -1.4 | A | TC = 25 °C | 1 | ||
| Maximum Power Dissipation (N-Ch) | PD | 1.6 | W | TC = 25 °C | 1 | ||
| Maximum Power Dissipation (P-Ch) | PD | 1.7 | W | TC = 25 °C | 1 | ||
| Maximum Power Dissipation (N-Ch) | PD | 1.1 | W | TA = 25 °C | 1 | ||
| Maximum Power Dissipation (P-Ch) | PD | 1.2 | W | TA = 25 °C | 1 | ||
| Operating Junction and Storage Temperature Range | TJ, Tstg | -55 | 150 | °C | 1 | ||
| Maximum Junction-to-Ambient (N-Ch) | RthJA | 85 | 110 | °C/W | t ≤ 10 s | 1 | |
| Maximum Junction-to-Ambient (P-Ch) | RthJA | 81 | 105 | °C/W | t ≤ 10 s | 1 | |
| Maximum Junction-to-Foot (Drain) (N-Ch) | RthJF | 62 | 80 | °C/W | Steady State | 1 | |
| Maximum Junction-to-Foot (Drain) (P-Ch) | RthJF | 57 | 75 | °C/W | Steady State | 1 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | overlies the drain pins. The copper plane connects the drain pins | 15 |
CAD (KiCad official)
- Symbol:
SI6562CDQ-T1-BE3 - Footprint:
Package_SO:TSSOP-8_3x3mm_P0.65mm - 3D model: TSSOP-8 (KiCad packages3D, STEP)
- 3D model files:
si6562cdq-t1-be3-etched.step/si6562cdq-t1-be3-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);si6562cdq-t1-be3.step/si6562cdq-t1-be3.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Vishay Intertech datasheet (17 pp, sha256
f1d7315b2663ef56, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SI6562CDQ-T1-BE3
**Vishay Intertech** · MOSFETs · TSSOP-8
SI6562CDQ-T1-BE3 from Vishay Intertech, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | D1 | passive | N-channel MOSFET drain (Q1); pin 1 is a drain pin that also carries the package thermal connection, and the N-channel VDS rating is 20 V. |
| 2 | S1 | passive | N-channel MOSFET source 1, which is tied to pin 3 (both S1) and is rated for the device's 20 V VDS limit. |
| 3 | S1 | passive | N-channel MOSFET source 1, which is tied to pin 2 (both S1) and is rated for the device's 20 V VDS limit. |
| 4 | G1 | input | N-channel MOSFET gate; gate-source voltage is limited to ±12 V (absolute maximum). |
| 5 | G2 | input | P-channel MOSFET gate; gate-source voltage is limited to ±12 V (absolute maximum). |
| 6 | S2 | passive | P-channel MOSFET source 2, which is tied to pin 7 (both S2) and is rated for the device's −20 V VDS limit. |
| 7 | S2 | passive | P-channel MOSFET source 2, which is tied to pin 6 (both S2) and is rated for the device's −20 V VDS limit. |
| 8 | D2 | passive | P-channel MOSFET drain (Q2); pin 8 is a drain pin that also carries the package thermal connection, and the P-channel VDS rating is −20 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Vishay Intertech |
| Package | TSSOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Breakdown Voltage (N-Ch) | VDS | 20 | | | V | VGS = 0 V, ID = 250 µA | 2 |
| Drain-Source Breakdown Voltage (P-Ch) | VDS | -20 | | | V | VGS = 0 V, ID = -250 µA | 2 |
| Gate Threshold Voltage (N-Ch) | VGS(th) | 0.6 | | 1.5 | V | VDS = VGS, ID = 250 µA | 2 |
| Gate Threshold Voltage (P-Ch) | VGS(th) | -1.5 | | -0.6 | V | VDS = VGS, ID = -250 µA | 2 |
| Gate-Body Leakage (N-Ch) | IGSS | -100 | | 100 | nA | VDS = 0 V, VGS = ± 12 V | 2 |
| Gate-Body Leakage (P-Ch) | IGSS | -100 | | 100 | nA | VDS = 0 V, VGS = ± 12 V | 2 |
| Zero Gate Voltage Drain Current (N-Ch) | IDSS | | | 1 | µA | VDS = 20 V, VGS = 0 V | 2 |
| Zero Gate Voltage Drain Current (P-Ch) | IDSS | | | -1 | µA | VDS = -20 V, VGS = 0 V | 2 |
| On-State Drain Current (N-Ch) | ID(on) | 30 | | | A | VDS ≥ 5 V, VGS = 4.5 V | 2 |
| On-State Drain Current (P-Ch) | ID(on) | -30 | | | A | VDS ≤ -5 V, VGS = -4.5 V | 2 |
| Drain-Source On-State Resistance (N-Ch, 4.5 V) | RDS(on) | | 0.018 | 0.022 | Ω | VGS = 4.5 V, ID = 5.7 A | 2 |
| Drain-Source On-State Resistance (P-Ch, -4.5 V) | RDS(on) | | 0.024 | 0.03 | Ω | VGS = -4.5 V, ID = -5.1 A | 2 |
| Drain-Source On-State Resistance (N-Ch, 2.5 V) | RDS(on) | | 0.029 | 0.036 | Ω | VGS = 2.5 V, ID = 4.4 A | 2 |
| Drain-Source On-State Resistance (P-Ch, -2.5 V) | RDS(on) | | 0.036 | 0.045 | Ω | VGS = -2.5 V, ID = -4.2 A | 2 |
| Total Gate Charge (N-Ch, 10 V) | Qg | | 15 | 23 | nC | VDS = 10 V, VGS = 10 V, ID = 5.7 A | 2 |
| Total Gate Charge (P-Ch, -10 V) | Qg | | 34 | 51 | nC | VDS = -10 V, VGS = -10 V, ID = -5.1 A | 2 |
| Total Gate Charge (N-Ch, 4.5 V) | Qg | | 6.7 | 11 | nC | VDS = 10 V, VGS = 4.5 V, ID = 5.7 A | 2 |
| Total Gate Charge (P-Ch, -4.5 V) | Qg | | 17 | 30 | nC | VDS = -10 V, VGS = -4.5 V, ID = -5.1 A | 2 |
| Turn-On Delay Time (N-Ch, VGEN 4.5 V) | td(on) | | 12 | 20 | ns | VDD = 10 V, RL = 2.2 Ω, ID ≅ 4.5 A, VGEN = 4.5 V, Rg = 1 Ω | 3 |
| Turn-On Delay Time (P-Ch, VGEN -4.5 V) | td(on) | | 30 | 45 | ns | VDD = -10 V, RL = 2.4 Ω, ID ≅ -4.1 A, VGEN = -4.5 V, Rg = 1 Ω | 3 |
| Rise Time (N-Ch, VGEN 4.5 V) | tr | | 10 | 15 | ns | VDD = 10 V, RL = 2.2 Ω, ID ≅ 4.5 A, VGEN = 4.5 V, Rg = 1 Ω | 3 |
| Rise Time (P-Ch, VGEN -4.5 V) | tr | | 25 | 40 | ns | VDD = -10 V, RL = 2.4 Ω, ID ≅ -4.1 A, VGEN = -4.5 V, Rg = 1 Ω | 3 |
| Turn-Off Delay Time (N-Ch, VGEN 4.5 V) | td(off) | | 25 | 40 | ns | VDD = 10 V, RL = 2.2 Ω, ID ≅ 4.5 A, VGEN = 4.5 V, Rg = 1 Ω | 3 |
| Turn-Off Delay Time (P-Ch, VGEN -4.5 V) | td(off) | | 45 | 70 | ns | VDD = -10 V, RL = 2.4 Ω, ID ≅ -4.1 A, VGEN = -4.5 V, Rg = 1 Ω | 3 |
| Fall Time (N-Ch, VGEN 4.5 V) | tf | | 10 | 15 | ns | VDD = 10 V, RL = 2.2 Ω, ID ≅ 4.5 A, VGEN = 4.5 V, Rg = 1 Ω | 3 |
| Fall Time (P-Ch, VGEN -4.5 V) | tf | | 15 | 25 | ns | VDD = -10 V, RL = 2.4 Ω, ID ≅ -4.1 A, VGEN = -4.5 V, Rg = 1 Ω | 3 |
| Turn-On Delay Time (N-Ch, VGEN 10 V) | td(on) | | 10 | 15 | ns | VDD = 10 V, RL = 2.2 Ω, ID ≅ 4.5 A, VGEN = 10 V, Rg = 1 Ω | 3 |
| Turn-On Delay Time (P-Ch, VGEN -10 V) | td(on) | | 10 | 15 | ns | VDD = -10 V, RL = 2.4 Ω, ID ≅ -4.1 A, VGEN = -10 V, Rg = 1 Ω | 3 |
| Rise Time (N-Ch, VGEN 10 V) | tr | | 10 | 15 | ns | VDD = 10 V, RL = 2.2 Ω, ID ≅ 4.5 A, VGEN = 10 V, Rg = 1 Ω | 3 |
| Rise Time (P-Ch, VGEN -10 V) | tr | | 10 | 15 | ns | VDD = -10 V, RL = 2.4 Ω, ID ≅ -4.1 A, VGEN = -10 V, Rg = 1 Ω | 3 |
| Turn-Off Delay Time (N-Ch, VGEN 10 V) | td(off) | | 20 | 30 | ns | VDD = 10 V, RL = 2.2 Ω, ID ≅ 4.5 A, VGEN = 10 V, Rg = 1 Ω | 3 |
| Turn-Off Delay Time (P-Ch, VGEN -10 V) | td(off) | | 45 | 70 | ns | VDD = -10 V, RL = 2.4 Ω, ID ≅ -4.1 A, VGEN = -10 V, Rg = 1 Ω | 3 |
| Fall Time (N-Ch, VGEN 10 V) | tf | | 8 | 15 | ns | VDD = 10 V, RL = 2.2 Ω, ID ≅ 4.5 A, VGEN = 10 V, Rg = 1 Ω | 3 |
| Fall Time (P-Ch, VGEN -10 V) | tf | | 15 | 25 | ns | VDD = -10 V, RL = 2.4 Ω, ID ≅ -4.1 A, VGEN = -10 V, Rg = 1 Ω | 3 |
| Body Diode Voltage (N-Ch) | VSD | | 0.8 | 1.2 | V | IS = 4.5 A, VGS = 0 V | 3 |
| Body Diode Voltage (P-Ch) | VSD | | -0.8 | -1.2 | V | IS = -4.1 A, VGS = 0 V | 3 |
| Body Diode Reverse Recovery Time (N-Ch) | trr | | 15 | 30 | ns | IF = 4.5 A, dI/dt = 100 A/µs, TJ = 25 °C | 3 |
| Body Diode Reverse Recovery Time (P-Ch) | trr | | 35 | 55 | ns | IF = -4.1 A, dI/dt = -100 A/µs, TJ = 25 °C | 3 |
| Body Diode Reverse Recovery Charge (N-Ch) | Qrr | | 6 | 12 | nC | IF = 4.5 A, dI/dt = 100 A/µs, TJ = 25 °C | 3 |
| Body Diode Reverse Recovery Charge (P-Ch) | Qrr | | 21 | 35 | nC | IF = -4.1 A, dI/dt = -100 A/µs, TJ = 25 °C | 3 |
| Drain-Source Voltage (N-Ch) | VDS | | | 20 | V | | 1 |
| Drain-Source Voltage (P-Ch) | VDS | | | -20 | V | | 1 |
| Gate-Source Voltage | VGS | -12 | | 12 | V | | 1 |
| Continuous Drain Current (N-Ch) | ID | | | 6.7 | A | TJ = 150 °C, TC = 25 °C | 1 |
| Continuous Drain Current (P-Ch) | ID | | | -6.1 | A | TJ = 150 °C, TC = 25 °C | 1 |
| Continuous Drain Current (N-Ch) | ID | | | 5.7 | A | TA = 25 °C | 1 |
| Continuous Drain Current (P-Ch) | ID | | | -5.1 | A | TA = 25 °C | 1 |
| Pulsed Drain Current (N-Ch) | IDM | | | 30 | A | | 1 |
| Pulsed Drain Current (P-Ch) | IDM | | | -30 | A | | 1 |
| Source Drain Current Diode Current (N-Ch) | IS | | | 1.3 | A | TC = 25 °C | 1 |
| Source Drain Current Diode Current (P-Ch) | IS | | | -1.4 | A | TC = 25 °C | 1 |
| Maximum Power Dissipation (N-Ch) | PD | | | 1.6 | W | TC = 25 °C | 1 |
| Maximum Power Dissipation (P-Ch) | PD | | | 1.7 | W | TC = 25 °C | 1 |
| Maximum Power Dissipation (N-Ch) | PD | | | 1.1 | W | TA = 25 °C | 1 |
| Maximum Power Dissipation (P-Ch) | PD | | | 1.2 | W | TA = 25 °C | 1 |
| Operating Junction and Storage Temperature Range | TJ, Tstg | -55 | | 150 | °C | | 1 |
| Maximum Junction-to-Ambient (N-Ch) | RthJA | | 85 | 110 | °C/W | t ≤ 10 s | 1 |
| Maximum Junction-to-Ambient (P-Ch) | RthJA | | 81 | 105 | °C/W | t ≤ 10 s | 1 |
| Maximum Junction-to-Foot (Drain) (N-Ch) | RthJF | | 62 | 80 | °C/W | Steady State | 1 |
| Maximum Junction-to-Foot (Drain) (P-Ch) | RthJF | | 57 | 75 | °C/W | Steady State | 1 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | | overlies the drain pins. The copper plane connects the drain pins | 15 |
## CAD (KiCad official)
- Symbol: `SI6562CDQ-T1-BE3`
- Footprint: `Package_SO:TSSOP-8_3x3mm_P0.65mm`
- 3D model: TSSOP-8 (KiCad packages3D, STEP)
- 3D model files: `si6562cdq-t1-be3-etched.step` / `si6562cdq-t1-be3-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `si6562cdq-t1-be3.step` / `si6562cdq-t1-be3.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Vishay Intertech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590908956057280512) (17 pp, sha256 `f1d7315b2663ef56`, retrieved 2026-10-19, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/si6562cdq-t1-be3-datasheet.pdf)