SI5340B-D-GM

{
  "slug": "si5340b-d-gm",
  "version": "0.1.0",
  "type": "component",
  "description": "Skyworks Solutions Clock Generators / Frequency Synthesizers / PLL, QFN-44(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "rtc-clock chip",
    "si5340b-d-gm",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "si5340b-d-gm.kicad_sym",
    "si5340b-d-gm.kicad_mod",
    "si5340b-d-gm.glb",
    "si5340b-d-gm.step",
    "si5340b-d-gm.lbr",
    "docs/hero.png",
    "docs/si5340b-d-gm-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "si5340b-d-gm-hero.glb",
    "si5340b-d-gm-hero.overlay.json",
    "si5340b-d-gm-etched.glb"
  ],
  "component": {
    "mpn": "SI5340B-D-GM",
    "manufacturer": "Skyworks Solutions",
    "package": "QFN-44(7x7)",
    "pin_count": 45,
    "category": "RTC/Clock Chip",
    "subcategory": "Clock Generators / Frequency Synthesizers / PLL",
    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/ca70372027a39ec31fca5e051b591a4a.pdf",
    "parts": {
      "symbol": "si5340b-d-gm.kicad_sym",
      "footprint": "si5340b-d-gm.kicad_mod",
      "model_3d": "si5340b-d-gm-hero.glb",
      "model_3d_plain": "si5340b-d-gm-etched.glb",
      "model_3d_step": "si5340b-d-gm-etched.step",
      "model_3d_step_plain": "si5340b-d-gm.step",
      "lbr": "si5340b-d-gm.lbr"
    },
    "distributor_links": {
      "lcsc": "C3607873",
      "digikey": "SI5340B-D-GM-ND",
      "mouser": "634-SI5340B-D-GM"
    },
    "distributor_check": {
      "checked_at": "2026-10-30T17:30:43Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "SI5340B-D-GM-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "634-SI5340B-D-GM",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "IN1",
        "type": "input",
        "description": "Clock input that accepts differential or single-ended clock signals; it is high-impedance and must be terminated externally."
      },
      {
        "number": "2",
        "name": "IN1b",
        "type": "input",
        "description": "Complementary half of the IN1 clock input pair, accepting differential or single-ended clocks; it is high-impedance and must be terminated externally."
      },
      {
        "number": "3",
        "name": "IN_SEL0",
        "type": "input",
        "description": "Input reference select bit 0 used in manual pin-controlled mode to choose the active clock input; internally pulled up with a ~20 kΩ resistor to the IO_VDD_SEL voltage and can be left unconnected."
      },
      {
        "number": "4",
        "name": "X1",
        "type": "passive",
        "description": "XTAL shield pin that must be connected directly to the XTAL ground pins, must not be tied to the PCB ground plane, and should be left disconnected when XA/XB is driven by an external reference clock."
      },
      {
        "number": "5",
        "name": "XA",
        "type": "input",
        "description": "Crystal or external clock input, selected when IN_SEL[1:0] = 11b; if unused and powered down it can be left unconnected."
      },
      {
        "number": "6",
        "name": "XB",
        "type": "input",
        "description": "Complementary crystal or external clock input for XA, used under the same conditions and may be left unconnected if unused and powered down."
      },
      {
        "number": "7",
        "name": "X2",
        "type": "passive",
        "description": "XTAL shield pin with the same requirements as X1: connect directly to the XTAL ground pins, keep off the PCB ground plane, and leave disconnected when using an external reference clock."
      },
      {
        "number": "8",
        "name": "VDDA",
        "type": "power_in",
        "description": "Core supply voltage of 3.3 V that requires a 3.3 V power source, with a 1.0 µF bypass capacitor recommended."
      },
      {
        "number": "9",
        "name": "VDDA",
        "type": "power_in",
        "description": "Core supply voltage of 3.3 V that requires a 3.3 V power source, with a 1.0 µF bypass capacitor recommended."
      },
      {
        "number": "10",
        "name": "IN2",
        "type": "input",
        "description": "Clock input that accepts differential or single-ended clock signals; it is high-impedance and must be terminated externally."
      },
      {
        "number": "11",
        "name": "IN2b",
        "type": "input",
        "description": "Complementary half of the IN2 clock input pair, accepting differential or single-ended clocks; it is high-impedance and must be terminated externally."
      },
      {
        "number": "12",
        "name": "OEb",
        "type": "input",
        "description": "Output enable that disables all outputs when held high; it is internally pulled low and can be left unconnected when not in use."
      },
      {
        "number": "13",
        "name": "SDA/SDIO",
        "type": "bidirectional",
        "description": "Serial data pin: SDA in I2C mode (requires an external pull-up of at least 1 kΩ), bidirectional SDIO in 3-wire SPI, or SDI in 4-wire SPI; no pull-up is needed in SPI mode."
      },
      {
        "number": "14",
        "name": "SCLK",
        "type": "input",
        "description": "Serial clock input for I2C and SPI modes, internally pulled up with ~20 kΩ to the IO_VDD_SEL voltage, and requiring an external pull-up of at least 1 kΩ in I2C mode."
      },
      {
        "number": "15",
        "name": "A1/SDO",
        "type": "bidirectional",
        "description": "Address select A1 in I2C mode (no internal pull-up or pull-down) or serial data output SDO in 4-wire SPI mode, driving high to the IO_VDD_SEL-selected voltage."
      },
      {
        "number": "16",
        "name": "A0/CSb",
        "type": "input",
        "description": "Hardware address A0 in I2C mode or active-low chip select in SPI mode, internally pulled up with ~20 kΩ to the IO_VDD_SEL-selected voltage."
      },
      {
        "number": "17",
        "name": "RSTb",
        "type": "input",
        "description": "Active-low device reset that performs power-on reset and forces registers to defaults; clock outputs are disabled during reset and the pin is internally pulled up with ~20 kΩ."
      },
      {
        "number": "18",
        "name": "VDDO0",
        "type": "power_in",
        "description": "Output clock supply for OUT0 driver at 3.3 V, 2.5 V or 1.8 V; leave unconnected if the output driver is unused."
      },
      {
        "number": "19",
        "name": "OUT0b",
        "type": "output",
        "description": "Complementary output clock 0 with register-configurable output format; termination per 3.5.2 and 3.5.4, and left unconnected if unused."
      },
      {
        "number": "20",
        "name": "OUT0",
        "type": "output",
        "description": "Output clock 0 with programmable signal amplitude when configured as differential, format set by register control; left unconnected if unused."
      },
      {
        "number": "21",
        "name": "VDD",
        "type": "power_in",
        "description": "Core supply voltage of 1.8 V, with a 1.0 µF bypass capacitor recommended."
      },
      {
        "number": "22",
        "name": "NC",
        "type": "unconnected",
        "description": "No connect pin not connected to the die; leave disconnected."
      },
      {
        "number": "23",
        "name": "VDDO1",
        "type": "power_in",
        "description": "Output clock supply for OUT1 driver at 3.3 V, 2.5 V or 1.8 V; leave unconnected if the output driver is unused."
      },
      {
        "number": "24",
        "name": "OUT1b",
        "type": "output",
        "description": "Complementary output clock 1 with register-configurable output format; left unconnected if unused."
      },
      {
        "number": "25",
        "name": "OUT1",
        "type": "output",
        "description": "Output clock 1 with programmable signal amplitude when configured as differential; left unconnected if unused."
      },
      {
        "number": "26",
        "name": "VDDS",
        "type": "power_in",
        "description": "Status output supply that sets the VOL/VOH of the LOLb and LOS_XAXBb outputs; a 0.1 µF to 1.0 µF bypass capacitor is recommended."
      },
      {
        "number": "27",
        "name": "LOLb",
        "type": "output",
        "description": "Loss-of-lock output that is high when the DSPLL is locked and low when out of lock; no external pull-up or pull-down is needed."
      },
      {
        "number": "28",
        "name": "LOS_XAXBb",
        "type": "output",
        "description": "Loss-of-signal output that indicates a loss of signal at the XA/XB pins."
      },
      {
        "number": "29",
        "name": "VDDO2",
        "type": "power_in",
        "description": "Output clock supply for OUT2 driver at 3.3 V, 2.5 V or 1.8 V; leave unconnected if the output driver is unused."
      },
      {
        "number": "30",
        "name": "OUT2b",
        "type": "output",
        "description": "Complementary output clock 2 with register-configurable output format; left unconnected if unused."
      },
      {
        "number": "31",
        "name": "OUT2",
        "type": "output",
        "description": "Output clock 2 with programmable signal amplitude when configured as differential; left unconnected if unused."
      },
      {
        "number": "32",
        "name": "VDD",
        "type": "power_in",
        "description": "Core supply voltage of 1.8 V, with a 1.0 µF bypass capacitor recommended."
      },
      {
        "number": "33",
        "name": "INTRb",
        "type": "output",
        "description": "Interrupt output asserted low on a device status change; it is push-pull and should be left unconnected when not in use."
      },
      {
        "number": "34",
        "name": "VDDO3",
        "type": "power_in",
        "description": "Output clock supply for OUT3 driver at 3.3 V, 2.5 V or 1.8 V; leave unconnected if the output driver is unused."
      },
      {
        "number": "35",
        "name": "OUT3b",
        "type": "output",
        "description": "Complementary output clock 3 with register-configurable output format; left unconnected if unused."
      },
      {
        "number": "36",
        "name": "OUT3",
        "type": "output",
        "description": "Output clock 3 with programmable signal amplitude when configured as differential; left unconnected if unused."
      },
      {
        "number": "37",
        "name": "IN_SEL1",
        "type": "input",
        "description": "Input reference select bit 1 used in manual pin-controlled mode with IN_SEL0; internally pulled up with ~20 kΩ and can be left unconnected."
      },
      {
        "number": "38",
        "name": "I2C_SEL",
        "type": "input",
        "description": "Serial interface select: high selects I2C mode and low selects SPI mode; internally pulled up with ~20 kΩ to the IO_VDD_SEL-selected voltage."
      },
      {
        "number": "39",
        "name": "VDD",
        "type": "power_in",
        "description": "Core supply voltage of 1.8 V, with a 1.0 µF bypass capacitor recommended."
      },
      {
        "number": "40",
        "name": "VDD",
        "type": "power_in",
        "description": "Core supply voltage of 1.8 V, with a 1.0 µF bypass capacitor recommended."
      },
      {
        "number": "41",
        "name": "FB_IN",
        "type": "input",
        "description": "External feedback input for optional zero delay mode; if unused and powered down it can be left floating."
      },
      {
        "number": "42",
        "name": "FB_INb",
        "type": "input",
        "description": "Complementary external feedback input for zero delay mode; if unused and powered down it can be left floating."
      },
      {
        "number": "43",
        "name": "IN0",
        "type": "input",
        "description": "Clock input that accepts differential or single-ended clock signals; it is high-impedance and must be terminated externally."
      },
      {
        "number": "44",
        "name": "IN0b",
        "type": "input",
        "description": "Complementary half of the IN0 clock input pair, accepting differential or single-ended clocks; it is high-impedance and must be terminated externally."
      },
      {
        "number": "45",
        "name": "EP",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The exposed ground pad is not given a number in the datasheet; it is listed as PAD and typed power_i; The Si5340 pin diagram text is garbled, so the VDD pin list (21, 32, 39, 40) was taken from the Si53; Pin 27 has no name of its own in Table 9.1; it is assigned the LOLb name from the shared Loss Of Loc",
          "exposed pad 45 added from the footprint",
          "dropped thermal pad ['EP'] absent from footprint"
        ],
        "pages_sent": 16,
        "cost_usd": 0.1022,
        "at": "2026-10-30T17:30:20"
      },
      "datasheet": {
        "url": "https://datasheet.lcsc.com/datasheet/pdf/ca70372027a39ec31fca5e051b591a4a.pdf",
        "pages": 49,
        "sha256": "a3f57dfa26cfac63",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 45,
        "described": 45,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "si5340b-d-gm.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          7.0,
          7.0,
          0.77
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "e095902326bdaee7dcc9926c9d1613852bfa37bad68a82560157ca7fe509925a",
        "checked": "2026-10-30",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "si5340b-d-gm-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          7.0,
          7.0,
          0.77
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "4e090646092b588efc9e17a66631f46055f0d412df8d9c33bddaffea94b86371",
        "checked": "2026-10-30",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ],
    "package_dims": {
      "package_code": "44-QFN (7x7 mm)",
      "source_page": 43,
      "D": {
        "nom_mm": 7.0,
        "range_mm": [
          null,
          null
        ]
      },
      "E1": {
        "nom_mm": 7.0,
        "range_mm": [
          null,
          null
        ]
      },
      "e": {
        "nom_mm": 0.5,
        "range_mm": [
          null,
          null
        ]
      },
      "A": {
        "nom_mm": 0.85,
        "range_mm": [
          0.8,
          0.9
        ]
      },
      "source": "datasheet package drawing, every number found on its page (extract_pins --task dims)",
      "model_check": {
        "file": "si5340b-d-gm.step",
        "verdict": "PASS",
        "reasons": [
          "height within the datasheet's package drawing"
        ],
        "by": "factory/package_fit.py"
      }
    }
  }
}