component

SI4946BEY-T1-E3-VB

Public Made by Adom

by adom

VBsemi Elec MOSFETs, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componenttransistors-thyristorssi4946bey-t1-e3-vbfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

Datasheet

Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

SI4946BEY-T1-E3-VB

VBsemi Elec · MOSFETs · SO-8

SI4946BEY-T1-E3-VB from VBsemi Elec, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S1 passive Source terminal of N-channel MOSFET 1 (the S1 leg of the dual device), shown in the top-view pinout and schematic.
2 G1 input Gate terminal of N-channel MOSFET 1; the datasheet gives VGS(th) of 1.5 to 2.5 V and a maximum VGS of ±20 V.
3 S2 passive Source terminal of N-channel MOSFET 2 (the S2 leg of the dual device), shown in the top-view pinout and schematic.
4 G2 input Gate terminal of N-channel MOSFET 2; the datasheet gives VGS(th) of 1.5 to 2.5 V and a maximum VGS of ±20 V.
5 D2 passive Drain terminal of N-channel MOSFET 2, internally connected to pin 6; the drain-source voltage rating is 60 V.
6 D2 passive Drain terminal of N-channel MOSFET 2, internally connected to pin 5; the drain-source voltage rating is 60 V.
7 D1 passive Drain terminal of N-channel MOSFET 1, internally connected to pin 8; the drain-source voltage rating is 60 V.
8 D1 passive Drain terminal of N-channel MOSFET 1, internally connected to pin 7; the drain-source voltage rating is 60 V.

Key specifications

Parameter Value
Manufacturer VBsemi Elec
Package SO-8
Category Transistors/Thyristors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDS 60 V 1
Gate-Source Voltage VGS -20 20 V 1
Continuous Drain Current ID 7 A TC = 25 °C 1
Continuous Drain Current ID 4 A TC = 125 °C 1
Continuous Source Current (Diode Conduction) IS 3.6 A 1
Pulsed Drain Current IDM 28 A pulse width ≤ 300 μs, duty cycle ≤ 2 % 1
Single Pulse Avalanche Current IAS 18 A L = 0.1 mH 1
Single Pulse Avalanche Energy EAS 16.2 mJ 1
Maximum Power Dissipation PD 4 W TC = 25 °C 1
Maximum Power Dissipation PD 1.3 W TC = 125 °C 1
Operating Junction and Storage Temperature Range TJ, Tstg -55 175 °C 1
Junction-to-Ambient Thermal Resistance RthJA 110 °C/W PCB mount, 1 in² square FR4 PCB 1
Junction-to-Foot (Drain) Thermal Resistance RthJF 34 °C/W 1
Drain-Source Breakdown Voltage VDS 60 V VGS = 0 V, ID = 250 μA 2
Gate-Source Threshold Voltage VGS(th) 1.5 2 2.5 V VDS = VGS, ID = 250 μA 2
Gate-Source Leakage IGSS -100 100 nA VDS = 0 V, VGS = ± 20 V 2
Zero Gate Voltage Drain Current IDSS 1 μA VGS = 0 V, VDS = 60 V 2
Zero Gate Voltage Drain Current IDSS 50 μA VGS = 0 V, VDS = 60 V, TJ = 125 °C 2
Zero Gate Voltage Drain Current IDSS 150 μA VGS = 0 V, VDS = 60 V, TJ = 175 °C 2
On-State Drain Current ID(on) 20 A VGS = 10 V, VDS ≥ 5 V 2
Gate Resistance Rg 1.3 6 Ω f = 1 MHz 2
Gate-Source Charge Qgs 1.8 2.7 nC VGS = 10 V, VDS = 30 V, ID = 5.3 A 2
Gate-Drain Charge Qgd 2.8 4.2 nC VGS = 10 V, VDS = 30 V, ID = 5.3 A 2
Turn-On Delay Time td(on) 7 11 ns VDD = 30 V, RL = 6.8 Ω, ID ≅ 4.4 A, VGEN = 10 V, Rg = 1 Ω 2
Turn-Off Delay Time td(off) 22.4 33.5 ns VDD = 30 V, RL = 6.8 Ω, ID ≅ 4.4 A, VGEN = 10 V, Rg = 1 Ω 2
Fall Time tf 2.1 3.2 ns VDD = 30 V, RL = 6.8 Ω, ID ≅ 4.4 A, VGEN = 10 V, Rg = 1 Ω 2
Pulsed Current ISM 28 A 2
Forward Voltage VSD 0.75 1.1 V IF = 2 A, VGS = 0 V 2
Output Capacitance Coss 110 140 pF VGS = 0 V, VDS = 25 V, f = 1 MHz 2
Reverse Transfer Capacitance Crss 50 62 pF VGS = 0 V, VDS = 25 V, f = 1 MHz 2
Drain-Source On-State Resistance RDS(on) 0.028 Ω VGS = 10 V, ID = 4.5 A 2
Drain-Source On-State Resistance RDS(on) 0.066 Ω VGS = 10 V, ID = 4.5 A, TJ = 125 °C 2
Drain-Source On-State Resistance RDS(on) 0.081 Ω VGS = 10 V, ID = 4.5 A, TJ = 175 °C 2
Drain-Source On-State Resistance RDS(on) 0.03 Ω VGS = 4.5 V, ID = 4 A 2
Forward Transconductance gfs 15 S VDS = 15 V, ID = 4.5 A 2
Input Capacitance Ciss 600 pF VGS = 0 V, VDS = 25 V, f = 1 MHz 2

CAD (KiCad official)

  • Symbol: SI4946BEY-T1-E3-VB
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: si4946bey-t1-e3-vb-etched.step / si4946bey-t1-e3-vb-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); si4946bey-t1-e3-vb.step / si4946bey-t1-e3-vb.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: VBsemi Elec datasheet (9 pp, sha256 1bcfe3d3cc20dafd, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF