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SI4850EY-T1-E3

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Vishay Intertech MOSFETs, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

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SI4850EY-T1-E3

Vishay Intertech · MOSFETs · SO-8

SI4850EY-T1-E3 from Vishay Intertech, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S passive Source terminal of the N-channel MOSFET; the datasheet rates the drain-source voltage at 60 V.
2 S passive Source terminal of the N-channel MOSFET; the datasheet rates the drain-source voltage at 60 V.
3 S passive Source terminal of the N-channel MOSFET; the datasheet rates the drain-source voltage at 60 V.
4 G input Gate terminal of the N-channel MOSFET; the absolute maximum gate-source voltage is ±20 V.
5 D passive Drain terminal of the N-channel MOSFET; continuous drain current is 8.5 A at TA = 25 °C (10 s) and the device is rated for TJ up to 175 °C.
6 D passive Drain terminal of the N-channel MOSFET; continuous drain current is 8.5 A at TA = 25 °C (10 s) and the device is rated for TJ up to 175 °C.
7 D passive Drain terminal of the N-channel MOSFET; continuous drain current is 8.5 A at TA = 25 °C (10 s) and the device is rated for TJ up to 175 °C.
8 D passive Drain terminal of the N-channel MOSFET; continuous drain current is 8.5 A at TA = 25 °C (10 s) and the device is rated for TJ up to 175 °C.

Key specifications

Parameter Value
Manufacturer Vishay Intertech
Package SO-8
Category Triode/MOS Tube/Transistor
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDS 60 V 1
Gate-Source Voltage VGS -20 20 V 1
Continuous Drain Current ID 8.5 A TJ = 175 °C, TA = 25 °C, 10 s 1
Continuous Drain Current ID 6 A TJ = 175 °C, TA = 25 °C, steady state 1
Continuous Drain Current ID 7.1 A TJ = 175 °C, TA = 70 °C, 10 s 1
Continuous Drain Current ID 5 A TJ = 175 °C, TA = 70 °C, steady state 1
Pulsed Drain Current IDM 40 A 1
Avalanche Current IAS 15 A 1
Single Pulse Avalanche Energy EAS 11 mJ 1
Maximum Power Dissipation PD 3.3 W TA = 25 °C, 10 s 1
Maximum Power Dissipation PD 1.7 W TA = 25 °C, steady state 1
Maximum Power Dissipation PD 2.3 W TA = 70 °C, 10 s 1
Maximum Power Dissipation PD 1.2 W TA = 70 °C, steady state 1
Operating Junction and Storage Temperature Range TJ, Tstg -55 175 °C 1
Maximum Junction-to-Ambient RthJA 36 45 °C/W t ≤ 10 s 1
Maximum Junction-to-Ambient RthJA 75 90 °C/W Steady State 1
Maximum Junction-to-Foot (Drain) RthJF 17 20 °C/W Steady State 1
Drain-Source Breakdown Voltage VDS 60 V VGS = 0 V, ID = 250 µA 2
Gate Threshold Voltage VGS(th) 1 3 V VDS = VGS, ID = 250 µA 2
Gate-Body Leakage IGSS -100 100 nA VDS = 0 V, VGS = ± 20 V 2
Zero Gate Voltage Drain Current IDSS 1 µA VDS = 60 V, VGS = 0 V 2
Zero Gate Voltage Drain Current IDSS 20 µA VDS = 60 V, VGS = 0 V, TJ = 55 °C 2
On-State Drain Current ID(on) 40 A VDS ≥ 5 V, VGS = 10 V 2
Drain-Source On-State Resistance RDS(on) 0.018 0.022 Ω VGS = 10 V, ID = 6.0 A 2
Drain-Source On-State Resistance RDS(on) 0.031 0.037 Ω VGS = 10 V, ID = 6.0 A, TJ = 125 °C 2
Drain-Source On-State Resistance RDS(on) 0.039 0.047 Ω VGS = 10 V, ID = 6.0 A, TJ = 175 °C 2
Drain-Source On-State Resistance RDS(on) 0.025 0.031 Ω VGS = 4.5 V, ID = 5.1 A 2
Diode Forward Voltage VSD 0.8 1.2 V IS = 1.7 A, VGS = 0 V 2
Total Gate Charge Qg 18 27 nC VDS = 30 V, VGS = 10 V, ID = 6.0 A 2
Gate Resistance Rg 0.5 1.4 2.4 Ω VGS = 0.1 V, f = 5 MHz 2
Turn-On Delay Time td(on) 10 20 ns VDD = 30 V, RL = 30 Ω, ID ≅ 1 A, VGEN = 10 V, Rg = 6 Ω 2
Rise Time tr 10 20 ns VDD = 30 V, RL = 30 Ω, ID ≅ 1 A, VGEN = 10 V, Rg = 6 Ω 2
Turn-Off Delay Time td(off) 25 50 ns VDD = 30 V, RL = 30 Ω, ID ≅ 1 A, VGEN = 10 V, Rg = 6 Ω 2
Fall Time tf 12 24 ns VDD = 30 V, RL = 30 Ω, ID ≅ 1 A, VGEN = 10 V, Rg = 6 Ω 2
Source-Drain Reverse Recovery Time trr 50 80 ns IF = 1.7 A, dI/dt = 100 A/µs 2
Forward Transconductance gfs 25 S VDS = 15 V, ID = 6.0 A 2

CAD (KiCad official)

  • Symbol: SI4850EY-T1-E3
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: si4850ey-t1-e3-etched.step / si4850ey-t1-e3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); si4850ey-t1-e3.step / si4850ey-t1-e3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Vishay Intertech datasheet (7 pp, sha256 50af8c6882b4aef1, retrieved 2026-10-21, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF