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SI4848DY-T1-E3

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Vishay Intertech MOSFETs, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SI4848DY-T1-E3

Vishay Intertech · MOSFETs · SO-8

SI4848DY-T1-E3 from Vishay Intertech, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S passive Source terminal of the N-channel MOSFET, rated for a drain-source voltage (VDS) of 150 V and a continuous source (diode) current of 1.3 A in steady state (2.5 A for 10 s).
2 S passive Source terminal of the N-channel MOSFET, rated for a drain-source voltage (VDS) of 150 V and a continuous source (diode) current of 1.3 A in steady state (2.5 A for 10 s).
3 S passive Source terminal of the N-channel MOSFET, rated for a drain-source voltage (VDS) of 150 V and a continuous source (diode) current of 1.3 A in steady state (2.5 A for 10 s).
4 G passive Gate terminal of the N-channel MOSFET; gate-source voltage is rated at ±20 V.
5 D passive Drain terminal of the MOSFET; pins 5 through 8 are the drain and are connected together on the PCB, with a continuous drain current of 3.7 A at TA = 25 °C (10 s).
6 D passive Drain terminal of the MOSFET; pins 5 through 8 are the drain and are connected together on the PCB, with a continuous drain current of 3.7 A at TA = 25 °C (10 s).
7 D passive Drain terminal of the MOSFET; pins 5 through 8 are the drain and are connected together on the PCB, with a continuous drain current of 3.7 A at TA = 25 °C (10 s).
8 D passive Drain terminal of the MOSFET; pins 5 through 8 are the drain and are connected together on the PCB, with a continuous drain current of 3.7 A at TA = 25 °C (10 s).

Key specifications

Parameter Value
Manufacturer Vishay Intertech
Package SO-8
Category Transistors/Thyristors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDS 150 V TA = 25 °C 1
Gate-Source Voltage VGS -20 20 V 1
Continuous Drain Current ID 3.7 A TJ = 150 °C, TA = 25 °C, t ≤ 10 s 1
Continuous Drain Current ID 2.7 A TJ = 150 °C, TA = 25 °C, steady state 1
Continuous Drain Current ID 3 A TJ = 150 °C, TA = 70 °C, t ≤ 10 s 1
Continuous Drain Current ID 2.1 A TJ = 150 °C, TA = 70 °C, steady state 1
Pulsed Drain Current IDM 25 A 1
Avalanche Current IAS 10 A L = 0.1 mH 1
Continuous Source Current (Diode Conduction) IS 2.5 A t ≤ 10 s 1
Continuous Source Current (Diode Conduction) IS 1.3 A steady state 1
Maximum Power Dissipation PD 3 W TA = 25 °C, t ≤ 10 s 1
Maximum Power Dissipation PD 1.5 W TA = 25 °C, steady state 1
Maximum Power Dissipation PD 1.9 W TA = 70 °C, t ≤ 10 s 1
Maximum Power Dissipation PD 1 W TA = 70 °C, steady state 1
Operating Junction and Storage Temperature Range TJ, Tstg -55 150 °C 1
Maximum Junction-to-Ambient Thermal Resistance RthJA 35 42 °C/W t ≤ 10 s 1
Maximum Junction-to-Ambient Thermal Resistance RthJA 68 82 °C/W steady state 1
Maximum Junction-to-Foot (Drain) Thermal Resistance RthJF 18 23 °C/W steady state 1
Gate-Body Leakage IGSS -100 100 nA VDS = 0 V, VGS = ± 20 V 2
Drain-Source On-State Resistance RDS(on) 0.068 0.085 Ω VGS = 10 V, ID = 3.5 A 2
Drain-Source On-State Resistance RDS(on) 0.076 0.095 Ω VGS = 6.0 V, ID = 3.0 A 2
Diode Forward Voltage VSD 0.75 1.2 V IS = 2.5 A, VGS = 0 V 2
Total Gate Charge Qg 17 21 nC VDS = 75 V, VGS = 10 V, ID = 3.5 A 2
Gate Resistance Rg 0.5 0.85 1.8 Ω 2
Turn-On Delay Time td(on) 9 14 ns VDD = 75 V, RL = 21 Ω, ID ≅ 3.5 A, VGEN = 10 V, Rg = 6 Ω 2
Rise Time tr 10 15 ns VDD = 75 V, RL = 21 Ω, ID ≅ 3.5 A, VGEN = 10 V, Rg = 6 Ω 2
Turn-Off Delay Time td(off) 24 35 ns VDD = 75 V, RL = 21 Ω, ID ≅ 3.5 A, VGEN = 10 V, Rg = 6 Ω 2
Fall Time tf 17 25 ns VDD = 75 V, RL = 21 Ω, ID ≅ 3.5 A, VGEN = 10 V, Rg = 6 Ω 2
Source-Drain Reverse Recovery Time trr 45 70 ns IF = 2.5 A, dI/dt = 100 A/µs 2

CAD (KiCad official)

  • Symbol: SI4848DY-T1-E3
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: si4848dy-t1-e3-etched.step / si4848dy-t1-e3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); si4848dy-t1-e3.step / si4848dy-t1-e3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Vishay Intertech datasheet (8 pp, sha256 2771471195363184, retrieved 2026-10-12, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF