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SI4848BDY-T1-GE3
Public Made by Adomby adom
Vishay Intertech MOSFETs, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSI4848BDY-T1-GE3
Vishay Intertech · MOSFETs · SOIC-8
SI4848BDY-T1-GE3 from Vishay Intertech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source terminal of the N-channel MOSFET, tied with pins 2 and 3. |
| 2 | S | passive | Source terminal of the N-channel MOSFET, tied with pins 1 and 3. |
| 3 | S | passive | Source terminal of the N-channel MOSFET, tied with pins 1 and 2. |
| 4 | G | input | Gate terminal with VGS rated ±20 V and a threshold voltage of 2 V to 4 V at ID = 250 µA. |
| 5 | D | passive | Drain terminal rated for VDS of 150 V, tied with pins 6, 7 and 8. |
| 6 | D | passive | Drain terminal rated for VDS of 150 V, tied with pins 5, 7 and 8. |
| 7 | D | passive | Drain terminal rated for VDS of 150 V, tied with pins 5, 6 and 8. |
| 8 | D | passive | Drain terminal rated for VDS of 150 V, tied with pins 5, 6 and 7. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Vishay Intertech |
| Package | SOIC-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-source voltage | VDS | 150 | V | TA = 25 °C | 1 | ||
| Gate-source voltage | VGS | -20 | 20 | V | TA = 25 °C | 1 | |
| Continuous drain current | ID | 5 | A | TJ = 150 °C, TC = 25 °C | 1 | ||
| Continuous drain current | ID | 4 | A | TJ = 150 °C, TC = 70 °C | 1 | ||
| Continuous drain current | ID | 3.7 | A | TJ = 150 °C, TA = 25 °C, a, b | 1 | ||
| Continuous drain current | ID | 3 | A | TJ = 150 °C, TA = 70 °C, a, b | 1 | ||
| Pulsed drain current | IDM | 15 | A | t = 100 μs | 1 | ||
| Continuous source-drain diode current | IS | 3.8 | A | TC = 25 °C | 1 | ||
| Continuous source-drain diode current | IS | 2.1 | A | TA = 25 °C, a, b | 1 | ||
| Single pulse avalanche current | IAS | 4 | A | L = 0.1 mH | 1 | ||
| Single pulse avalanche energy | EAS | 0.8 | mJ | L = 0.1 mH | 1 | ||
| Maximum power dissipation | PD | 4.5 | W | TC = 25 °C | 1 | ||
| Maximum power dissipation | PD | 2.9 | W | TC = 70 °C | 1 | ||
| Maximum power dissipation | PD | 2.5 | W | TA = 25 °C, a, b | 1 | ||
| Maximum power dissipation | PD | 1.6 | W | TA = 70 °C, a, b | 1 | ||
| Operating junction and storage temperature range | TJ, Tstg | -55 | 150 | °C | 1 | ||
| Junction-to-ambient thermal resistance | RthJA | 43 | 50 | °C/W | t ≤ 10 s, a, c | 1 | |
| Junction-to-foot (drain) thermal resistance | RthJF | 22 | 28 | °C/W | Steady state | 1 | |
| Drain-source breakdown voltage | VDS | 150 | V | VGS = 0 V, ID = 250 μA | 2 | ||
| Gate-source threshold voltage | VGS(th) | 2 | 4 | V | VDS = VGS, ID = 250 μA | 2 | |
| Gate-source leakage | IGSS | -100 | 100 | nA | VDS = 0 V, VGS = ± 20 V | 2 | |
| Zero gate voltage drain current | IDSS | 1 | μA | VDS = 150 V, VGS = 0 V | 2 | ||
| Zero gate voltage drain current | IDSS | 10 | μA | VDS = 150 V, VGS = 0 V, TJ = 70 °C | 2 | ||
| On-state drain current | ID(on) | 10 | A | VDS ≤ 10 V, VGS = 10 V | 2 | ||
| Drain-source on-state resistance | RDS(on) | 0.0742 | 0.089 | Ω | VGS = 10 V, ID = 3.7 A | 2 | |
| Drain-source on-state resistance | RDS(on) | 0.084 | 0.11 | Ω | VGS = 6 V, ID = 3.0 A | 2 | |
| Total gate charge | Qg | 6 | 9 | nC | VDS = 75 V, VGS = 10 V, ID = 3.7 A | 2 | |
| Total gate charge | Qg | 3.7 | 5.6 | nC | VDS = 75 V, VGS = 6 V, ID = 3.7 A | 2 | |
| Gate resistance | Rg | 0.5 | 2.5 | 5 | Ω | f = 1 MHz | 2 |
| Turn-on delay time | td(on) | 8 | 16 | ns | VDD = 75 V, RL = 25 Ω, ID ≅ 3 A, VGEN = 10 V, Rg = 1 Ω | 2 | |
| Rise time | tr | 6 | 12 | ns | VDD = 75 V, RL = 25 Ω, ID ≅ 3 A, VGEN = 10 V, Rg = 1 Ω | 2 | |
| Turn-off delay time | td(off) | 12 | 24 | ns | VDD = 75 V, RL = 25 Ω, ID ≅ 3 A, VGEN = 10 V, Rg = 1 Ω | 2 | |
| Fall time | tf | 35 | 53 | ns | VDD = 75 V, RL = 25 Ω, ID ≅ 3 A, VGEN = 10 V, Rg = 1 Ω | 2 | |
| Turn-on delay time | td(on) | 10 | 20 | ns | VDD = 75 V, RL = 25 Ω, ID ≅ 3 A, VGEN = 6 V, Rg = 1 Ω | 2 | |
| Rise time | tr | 8 | 16 | ns | VDD = 75 V, RL = 25 Ω, ID ≅ 3 A, VGEN = 6 V, Rg = 1 Ω | 2 | |
| Turn-off delay time | td(off) | 15 | 30 | ns | VDD = 75 V, RL = 25 Ω, ID ≅ 3 A, VGEN = 6 V, Rg = 1 Ω | 2 | |
| Fall time | tf | 32 | 48 | ns | VDD = 75 V, RL = 25 Ω, ID ≅ 3 A, VGEN = 6 V, Rg = 1 Ω | 2 | |
| Continuous source-drain diode current | IS | 2.1 | A | TC = 25 °C | 2 | ||
| Pulse diode forward current | ISM | 15 | A | 2 | |||
| Body diode voltage | VSD | 0.85 | 1.2 | V | IS = 3 A, VGS = 0 V | 2 | |
| Body diode reverse recovery time | trr | 238 | 357 | ns | IF = 3 A, di/dt = 100 A/μs, TJ = 25 °C | 2 | |
| Body diode reverse recovery charge | Qrr | 1895 | 2843 | nC | IF = 3 A, di/dt = 100 A/μs, TJ = 25 °C | 2 | |
| VDS temperature coefficient | ΔVDS/TJ | 92 | mV/°C | ID = 250 μA | 2 | ||
| VGS(th) temperature coefficient | ΔVGS(th)/TJ | -5.2 | mV/°C | ID = 250 μA | 2 | ||
| Forward transconductance | gfs | 5 | S | VDS = 10 V, ID = 3.7 A | 2 | ||
| Input capacitance | Ciss | 400 | pF | VDS = 75 V, VGS = 0 V, f = 1 MHz | 2 | ||
| Output capacitance | Coss | 41 | pF | VDS = 75 V, VGS = 0 V, f = 1 MHz | 2 | ||
| Reverse transfer capacitance | Crss | 3 | pF | VDS = 75 V, VGS = 0 V, f = 1 MHz | 2 | ||
| Gate-source charge | Qgs | 2.2 | nC | VDS = 75 V, VGS = 6 V, ID = 3.7 A | 2 | ||
| Gate-drain charge | Qgd | 0.8 | nC | VDS = 75 V, VGS = 6 V, ID = 3.7 A | 2 |
CAD (KiCad official)
- Symbol:
SI4848BDY-T1-GE3 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
si4848bdy-t1-ge3-etched.step/si4848bdy-t1-ge3-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);si4848bdy-t1-ge3.step/si4848bdy-t1-ge3.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Vishay Intertech datasheet (7 pp, sha256
a7258a2153934cac, retrieved 2026-10-23, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).