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SI4840DY-T1-E3-VB

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VBsemi Elec MOSFETs, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SI4840DY-T1-E3-VB

VBsemi Elec · MOSFETs · SO-8

SI4840DY-T1-E3-VB from VBsemi Elec, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S passive Source terminal of the N-channel MOSFET; the body diode forward voltage VSD is 0.8 V typical and 1.2 V maximum at IS = 10 A.
2 S passive Source terminal of the N-channel MOSFET; the body diode forward voltage VSD is 0.8 V typical and 1.2 V maximum at IS = 10 A.
3 S passive Source terminal of the N-channel MOSFET; the body diode forward voltage VSD is 0.8 V typical and 1.2 V maximum at IS = 10 A.
4 G input Gate terminal; the gate-source voltage VGS is rated ±20 V and the gate resistance Rg is 1.4 Ω typical, 2.1 Ω maximum.
5 D passive Drain terminal of the N-channel MOSFET; the drain-source voltage VDS is rated 40 V.
6 D passive Drain terminal of the N-channel MOSFET; the drain-source voltage VDS is rated 40 V.
7 D passive Drain terminal of the N-channel MOSFET; the drain-source voltage VDS is rated 40 V.
8 D passive Drain terminal of the N-channel MOSFET; the drain-source voltage VDS is rated 40 V.

Key specifications

Parameter Value
Manufacturer VBsemi Elec
Package SO-8
Category Transistors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDS 40 V 1
Gate-Source Voltage VGS -20 20 V 1
Pulsed Drain Current IDM 50 A 1
Avalanche Current IAS 15 A 1
Avalanche Energy EAS 11 mJ L = 0.1 mH 1
Operating Junction and Storage Temperature Range TJ, Tstg -55 150 °C 1
Maximum Junction-to-Ambient thermal resistance RthJA 37 50 °C/W t ≤ 10 s 1
Maximum Junction-to-Ambient thermal resistance, steady state RthJA 85 °C/W Steady state, note c 1
Maximum Junction-to-Foot (Drain) thermal resistance RthJF 17 21 °C/W Steady state 1
Drain-Source Breakdown Voltage VDS 40 V VGS = 0 V, ID = 250 µA 2
Gate-Source Threshold Voltage VGS(th) 1 3 V VDS = VGS, ID = 250 µA 2
Gate-Source Leakage IGSS -100 100 nA VDS = 0 V, VGS = ± 20 V 2
Zero Gate Voltage Drain Current IDSS 1 µA VDS = 40 V, VGS = 0 V 2
Zero Gate Voltage Drain Current at TJ = 55 °C IDSS 5 µA VDS = 40 V, VGS = 0 V, TJ = 55 °C 2
On-State Drain Current ID(on) 50 A VDS ≥ 5 V, VGS = 10 V 2
Drain-Source On-State Resistance RDS(on) 0.014 Ω VGS = 10 V, ID = 12.4 A 2
Drain-Source On-State Resistance RDS(on) 0.016 Ω VGS = 4.5 V, ID = 10.8 A 2
Body Diode Voltage VSD 0.8 1.2 V IS = 10 A, VGS = 0 V 2
Body Diode Reverse Recovery Time trr 30 60 ns IF = 10 A, dI/dt = 100 A/µs, TJ = 25 °C 2
Body Diode Reverse Recovery Charge Qrr 26 52 nC IF = 10 A, dI/dt = 100 A/µs, TJ = 25 °C 2
Total Gate Charge Qg 33 50 nC VDS = 10 V, VGS = 10 V, ID = 12.4 A 2
Total Gate Charge Qg 15 23 nC VDS = 10 V, VGS = 4.5 V, ID = 12.4 A 2
Gate Resistance Rg 1.4 2.1 Ω f = 1 MHz 2
Turn-On Delay Time td(on) 25 40 ns VDD = 20 V, RL = 2 Ω, ID ≅ 10 A, VGEN = 4.5 V, Rg = 1 Ω 2
Rise Time tr 12 20 ns VDD = 20 V, RL = 2 Ω, ID ≅ 10 A, VGEN = 4.5 V, Rg = 1 Ω 2
Turn-Off Delay Time td(off) 25 40 ns VDD = 20 V, RL = 2 Ω, ID ≅ 10 A, VGEN = 4.5 V, Rg = 1 Ω 2
Fall Time tf 10 15 ns VDD = 20 V, RL = 2 Ω, ID ≅ 10 A, VGEN = 4.5 V, Rg = 1 Ω 2
Turn-On Delay Time td(on) 10 15 ns VDD = 20 V, RL = 2 Ω, ID ≅ 10 A, VGEN = 10 V, Rg = 1 Ω 2
Rise Time tr 15 25 ns VDD = 20 V, RL = 2 Ω, ID ≅ 10 A, VGEN = 10 V, Rg = 1 Ω 2
Turn-Off Delay Time td(off) 30 45 ns VDD = 20 V, RL = 2 Ω, ID ≅ 10 A, VGEN = 10 V, Rg = 1 Ω 2
Drain-Source Body Diode Temperature Coefficient ΔVDS/TJ 40 mV/°C ID = 250 µA 2
Gate-Source Threshold Voltage Temperature Coefficient ΔVGS(th)/TJ -6 mV/°C 2

CAD (KiCad official)

  • Symbol: SI4840DY-T1-E3-VB
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: si4840dy-t1-e3-vb-etched.step / si4840dy-t1-e3-vb-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); si4840dy-t1-e3-vb.step / si4840dy-t1-e3-vb.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: VBsemi Elec datasheet (9 pp, sha256 b8c52ffd0463cfce, retrieved 2026-10-27, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus off (skipped (clean text read)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF