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SI4564DY-T1-GE3
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Vishay Intertech MOSFETs, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SI4564DY-T1-GE3
Vishay Intertech · MOSFETs · SO-8
SI4564DY-T1-GE3 from Vishay Intertech, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source of the N-channel MOSFET, which the datasheet rates for VDS of 40 V and VGS of ±16 V. |
| 2 | G1 | input | Gate of the N-channel MOSFET, with VGS limited to ±16 V by the absolute maximum ratings. |
| 3 | S2 | passive | Source of the P-channel MOSFET, which the datasheet rates for VDS of -40 V and VGS of ±20 V. |
| 4 | G2 | input | Gate of the P-channel MOSFET, with VGS limited to ±20 V by the absolute maximum ratings. |
| 5 | D2 | passive | Drain of the P-channel MOSFET, which the datasheet rates for continuous ID of -9.2 A at TC = 25 °C. |
| 6 | D2 | passive | Drain of the P-channel MOSFET (second drain pin, internally tied to pin 5), rated as in the P-channel absolute maximum ratings. |
| 7 | D1 | passive | Drain of the N-channel MOSFET, which the datasheet rates for continuous ID of 10 A at TC = 25 °C. |
| 8 | D1 | passive | Drain of the N-channel MOSFET (second drain pin, internally tied to pin 7), rated as in the N-channel absolute maximum ratings. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Vishay Intertech |
| Package | SO-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDS | 40 | V | N-Channel | 1 | ||
| Drain-Source Voltage | VDS | -40 | V | P-Channel | 1 | ||
| Gate-Source Voltage | VGS | -16 | 16 | V | N-Channel | 1 | |
| Gate-Source Voltage | VGS | -20 | 20 | V | P-Channel | 1 | |
| Continuous Drain Current (TJ = 150 °C) | ID | 10 | A | TJ = 150 °C, TC = 25 °C, N-Channel | 1 | ||
| Continuous Drain Current (TJ = 150 °C) | ID | -9.2 | A | TJ = 150 °C, TC = 25 °C, P-Channel | 1 | ||
| Continuous Drain Current (TJ = 150 °C), TA = 25 °C | ID | 8 | A | TA = 25 °C, t = 10 s, N-Channel | 1 | ||
| Continuous Drain Current (TJ = 150 °C), TA = 25 °C | ID | -7.2 | A | TA = 25 °C, t = 10 s, P-Channel | 1 | ||
| Pulsed Drain Current | IDM | 40 | A | 10 µs pulse width, N-Channel | 1 | ||
| Pulsed Drain Current | IDM | -40 | A | 10 µs pulse width, P-Channel | 1 | ||
| Single Pulse Avalanche Current | IAS | 10 | A | L = 0.1 mH, N-Channel | 1 | ||
| Single Pulse Avalanche Current | IAS | -20 | A | L = 0.1 mH, P-Channel | 1 | ||
| Single Pulse Avalanche Energy | EAS | 5 | mJ | 1 | |||
| Single Pulse Avalanche Energy | EAS | 20 | mJ | 1 | |||
| Maximum Power Dissipation | PD | 3.1 | W | TC = 25 °C, N-Channel | 1 | ||
| Maximum Power Dissipation | PD | 3.2 | W | TC = 25 °C, P-Channel | 1 | ||
| Maximum Power Dissipation | PD | 2 | W | TA = 25 °C, N-Channel | 1 | ||
| Operating Junction and Storage Temperature Range | TJ, Tstg | -55 | 150 | °C | 1 | ||
| Maximum Junction-to-Ambient (t ≤ 10 s) | RthJA | 50 | 62.5 | °C/W | t ≤ 10 s, N-Channel | 1 | |
| Maximum Junction-to-Ambient (t ≤ 10 s) | RthJA | 47 | 62.5 | °C/W | t ≤ 10 s, P-Channel | 1 | |
| Maximum Junction-to-Foot (Drain), Steady State | RthJF | 30 | 40 | °C/W | Steady state, N-Channel | 1 | |
| Maximum Junction-to-Foot (Drain), Steady State | RthJF | 29 | 38 | °C/W | Steady state, P-Channel | 1 | |
| Maximum Junction-to-Ambient, Steady State (note d) | RthJA | 120 | °C/W | Steady state, N-Channel | 1 | ||
| Maximum Junction-to-Ambient, Steady State (note d) | RthJA | 110 | °C/W | Steady state, P-Channel | 1 | ||
| Drain-Source Breakdown Voltage | VDS | 40 | V | VGS = 0 V, ID = 250 µA, N-Ch | 2 | ||
| Drain-Source Breakdown Voltage | VDS | -40 | V | VGS = 0 V, ID = -250 µA, P-Ch | 2 | ||
| Gate Threshold Voltage | VGS(th) | 0.8 | 2 | V | VDS = VGS, ID = 250 µA, N-Ch | 2 | |
| Gate Threshold Voltage | VGS(th) | -2.5 | -1.2 | V | VDS = VGS, ID = -250 µA, P-Ch | 2 | |
| Gate-Body Leakage | IGSS | -100 | 100 | nA | VDS = 0 V, VGS = ±16 V, N-Ch | 2 | |
| Zero Gate Voltage Drain Current | IDSS | 1 | µA | VDS = 40 V, VGS = 0 V, N-Ch | 2 | ||
| Zero Gate Voltage Drain Current | IDSS | -1 | µA | VDS = -40 V, VGS = 0 V, P-Ch | 2 | ||
| On-State Drain Current | ID(on) | 20 | A | VDS = 5 V, VGS = 10 V, N-Ch | 2 | ||
| On-State Drain Current | ID(on) | -20 | A | VDS = -5 V, VGS = -10 V, P-Ch | 2 | ||
| Drain-Source On-State Resistance | RDS(on) | 0.0145 | 0.0175 | Ω | VGS = 10 V, ID = 8 A, N-Ch | 2 | |
| Drain-Source On-State Resistance | RDS(on) | 0.0175 | 0.021 | Ω | VGS = -10 V, ID = -8 A, P-Ch | 2 | |
| Drain-Source On-State Resistance | RDS(on) | 0.017 | 0.02 | Ω | VGS = 4.5 V, ID = 5 A, N-Ch | 2 | |
| Drain-Source On-State Resistance | RDS(on) | 0.0232 | 0.028 | Ω | VGS = -4.5 V, ID = -5 A, P-Ch | 2 | |
| Total Gate Charge | Qg | 20.5 | 31 | nC | VDS = 20 V, VGS = 10 V, ID = 10 A, N-Ch | 2 | |
| Total Gate Charge | Qg | 41.5 | 63 | nC | VDS = -20 V, VGS = -10 V, ID = -10 A, P-Ch | 2 | |
| Total Gate Charge | Qg | 9.8 | 15 | nC | VDS = 20 V, VGS = 4.5 V, ID = 10 A, N-Ch | 2 | |
| Total Gate Charge | Qg | 21.7 | 33 | nC | VDS = -20 V, VGS = -4.5 V, ID = -10 A, P-Ch | 2 | |
| Gate Resistance | Rg | 0.3 | 1.5 | 3 | Ω | f = 1 MHz, N-Ch | 2 |
| Gate Resistance | Rg | 1.3 | 6.4 | 12.8 | Ω | f = 1 MHz, P-Ch | 2 |
| Turn-On Delay Time (VGEN = 10 V) | td(on) | 7 | 14 | ns | VDD = 20 V, RL = 2 Ω, ID ≅ 10 A, VGEN = 10 V, Rg = 1 Ω, N-Ch | 3 | |
| Turn-On Delay Time (VGEN = 10 V) | td(on) | 9 | 18 | ns | VDD = -20 V, RL = 2 Ω, ID ≅ -10 A, VGEN = -10 V, Rg = 1 Ω, P-Ch | 3 | |
| Rise Time (VGEN = 10 V) | tr | 10 | 20 | ns | VDD = 20 V, RL = 2 Ω, ID ≅ 10 A, VGEN = 10 V, Rg = 1 Ω, N-Ch | 3 | |
| Rise Time (VGEN = 10 V) | tr | 9 | 18 | ns | VDD = -20 V, RL = 2 Ω, ID ≅ -10 A, VGEN = -10 V, Rg = 1 Ω, P-Ch | 3 | |
| Turn-Off Delay Time (VGEN = 10 V) | td(off) | 18 | 36 | ns | VDD = 20 V, RL = 2 Ω, ID ≅ 10 A, VGEN = 10 V, Rg = 1 Ω, N-Ch | 3 | |
| Turn-Off Delay Time (VGEN = 10 V) | td(off) | 50 | 90 | ns | VDD = -20 V, RL = 2 Ω, ID ≅ -10 A, VGEN = -10 V, Rg = 1 Ω, P-Ch | 3 | |
| Fall Time (VGEN = 10 V) | tf | 9 | 18 | ns | VDD = 20 V, RL = 2 Ω, ID ≅ 10 A, VGEN = 10 V, Rg = 1 Ω, N-Ch | 3 | |
| Fall Time (VGEN = 10 V) | tf | 14 | 28 | ns | VDD = -20 V, RL = 2 Ω, ID ≅ -10 A, VGEN = -10 V, Rg = 1 Ω, P-Ch | 3 | |
| Body Diode Voltage | VSD | 0.74 | 1.2 | V | IS = 2 A, N-Ch | 3 | |
| Body Diode Voltage | VSD | -0.77 | -1.2 | V | IS = -2 A, P-Ch | 3 | |
| Body Diode Reverse Recovery Time | trr | 17 | 34 | ns | IF = 5 A, dI/dt = 100 A/µs, TJ = 25 °C, N-Ch | 3 | |
| Body Diode Reverse Recovery Time | trr | 30 | 60 | ns | IF = -5 A, dI/dt = -100 A/µs, TJ = 25 °C, P-Ch | 3 | |
| Body Diode Reverse Recovery Charge | Qrr | 10 | 20 | nC | 3 | ||
| Body Diode Reverse Recovery Charge | Qrr | 26 | 52 | nC | 3 |
CAD (KiCad official)
- Symbol:
SI4564DY-T1-GE3 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files:
si4564dy-t1-ge3-etched.step/si4564dy-t1-ge3-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);si4564dy-t1-ge3.step/si4564dy-t1-ge3.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Vishay Intertech datasheet (14 pp, sha256
95fa0aa98a6274a6, retrieved 2026-10-21, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SI4564DY-T1-GE3
**Vishay Intertech** · MOSFETs · SO-8
SI4564DY-T1-GE3 from Vishay Intertech, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source of the N-channel MOSFET, which the datasheet rates for VDS of 40 V and VGS of ±16 V. |
| 2 | G1 | input | Gate of the N-channel MOSFET, with VGS limited to ±16 V by the absolute maximum ratings. |
| 3 | S2 | passive | Source of the P-channel MOSFET, which the datasheet rates for VDS of -40 V and VGS of ±20 V. |
| 4 | G2 | input | Gate of the P-channel MOSFET, with VGS limited to ±20 V by the absolute maximum ratings. |
| 5 | D2 | passive | Drain of the P-channel MOSFET, which the datasheet rates for continuous ID of -9.2 A at TC = 25 °C. |
| 6 | D2 | passive | Drain of the P-channel MOSFET (second drain pin, internally tied to pin 5), rated as in the P-channel absolute maximum ratings. |
| 7 | D1 | passive | Drain of the N-channel MOSFET, which the datasheet rates for continuous ID of 10 A at TC = 25 °C. |
| 8 | D1 | passive | Drain of the N-channel MOSFET (second drain pin, internally tied to pin 7), rated as in the N-channel absolute maximum ratings. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Vishay Intertech |
| Package | SO-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDS | | | 40 | V | N-Channel | 1 |
| Drain-Source Voltage | VDS | -40 | | | V | P-Channel | 1 |
| Gate-Source Voltage | VGS | -16 | | 16 | V | N-Channel | 1 |
| Gate-Source Voltage | VGS | -20 | | 20 | V | P-Channel | 1 |
| Continuous Drain Current (TJ = 150 °C) | ID | | | 10 | A | TJ = 150 °C, TC = 25 °C, N-Channel | 1 |
| Continuous Drain Current (TJ = 150 °C) | ID | -9.2 | | | A | TJ = 150 °C, TC = 25 °C, P-Channel | 1 |
| Continuous Drain Current (TJ = 150 °C), TA = 25 °C | ID | | | 8 | A | TA = 25 °C, t = 10 s, N-Channel | 1 |
| Continuous Drain Current (TJ = 150 °C), TA = 25 °C | ID | -7.2 | | | A | TA = 25 °C, t = 10 s, P-Channel | 1 |
| Pulsed Drain Current | IDM | | | 40 | A | 10 µs pulse width, N-Channel | 1 |
| Pulsed Drain Current | IDM | -40 | | | A | 10 µs pulse width, P-Channel | 1 |
| Single Pulse Avalanche Current | IAS | | | 10 | A | L = 0.1 mH, N-Channel | 1 |
| Single Pulse Avalanche Current | IAS | -20 | | | A | L = 0.1 mH, P-Channel | 1 |
| Single Pulse Avalanche Energy | EAS | | | 5 | mJ | | 1 |
| Single Pulse Avalanche Energy | EAS | | | 20 | mJ | | 1 |
| Maximum Power Dissipation | PD | | | 3.1 | W | TC = 25 °C, N-Channel | 1 |
| Maximum Power Dissipation | PD | | | 3.2 | W | TC = 25 °C, P-Channel | 1 |
| Maximum Power Dissipation | PD | | | 2 | W | TA = 25 °C, N-Channel | 1 |
| Operating Junction and Storage Temperature Range | TJ, Tstg | -55 | | 150 | °C | | 1 |
| Maximum Junction-to-Ambient (t ≤ 10 s) | RthJA | | 50 | 62.5 | °C/W | t ≤ 10 s, N-Channel | 1 |
| Maximum Junction-to-Ambient (t ≤ 10 s) | RthJA | | 47 | 62.5 | °C/W | t ≤ 10 s, P-Channel | 1 |
| Maximum Junction-to-Foot (Drain), Steady State | RthJF | | 30 | 40 | °C/W | Steady state, N-Channel | 1 |
| Maximum Junction-to-Foot (Drain), Steady State | RthJF | | 29 | 38 | °C/W | Steady state, P-Channel | 1 |
| Maximum Junction-to-Ambient, Steady State (note d) | RthJA | | | 120 | °C/W | Steady state, N-Channel | 1 |
| Maximum Junction-to-Ambient, Steady State (note d) | RthJA | | | 110 | °C/W | Steady state, P-Channel | 1 |
| Drain-Source Breakdown Voltage | VDS | 40 | | | V | VGS = 0 V, ID = 250 µA, N-Ch | 2 |
| Drain-Source Breakdown Voltage | VDS | -40 | | | V | VGS = 0 V, ID = -250 µA, P-Ch | 2 |
| Gate Threshold Voltage | VGS(th) | 0.8 | | 2 | V | VDS = VGS, ID = 250 µA, N-Ch | 2 |
| Gate Threshold Voltage | VGS(th) | -2.5 | | -1.2 | V | VDS = VGS, ID = -250 µA, P-Ch | 2 |
| Gate-Body Leakage | IGSS | -100 | | 100 | nA | VDS = 0 V, VGS = ±16 V, N-Ch | 2 |
| Zero Gate Voltage Drain Current | IDSS | | | 1 | µA | VDS = 40 V, VGS = 0 V, N-Ch | 2 |
| Zero Gate Voltage Drain Current | IDSS | -1 | | | µA | VDS = -40 V, VGS = 0 V, P-Ch | 2 |
| On-State Drain Current | ID(on) | 20 | | | A | VDS = 5 V, VGS = 10 V, N-Ch | 2 |
| On-State Drain Current | ID(on) | -20 | | | A | VDS = -5 V, VGS = -10 V, P-Ch | 2 |
| Drain-Source On-State Resistance | RDS(on) | | 0.0145 | 0.0175 | Ω | VGS = 10 V, ID = 8 A, N-Ch | 2 |
| Drain-Source On-State Resistance | RDS(on) | | 0.0175 | 0.021 | Ω | VGS = -10 V, ID = -8 A, P-Ch | 2 |
| Drain-Source On-State Resistance | RDS(on) | | 0.017 | 0.02 | Ω | VGS = 4.5 V, ID = 5 A, N-Ch | 2 |
| Drain-Source On-State Resistance | RDS(on) | | 0.0232 | 0.028 | Ω | VGS = -4.5 V, ID = -5 A, P-Ch | 2 |
| Total Gate Charge | Qg | | 20.5 | 31 | nC | VDS = 20 V, VGS = 10 V, ID = 10 A, N-Ch | 2 |
| Total Gate Charge | Qg | | 41.5 | 63 | nC | VDS = -20 V, VGS = -10 V, ID = -10 A, P-Ch | 2 |
| Total Gate Charge | Qg | | 9.8 | 15 | nC | VDS = 20 V, VGS = 4.5 V, ID = 10 A, N-Ch | 2 |
| Total Gate Charge | Qg | | 21.7 | 33 | nC | VDS = -20 V, VGS = -4.5 V, ID = -10 A, P-Ch | 2 |
| Gate Resistance | Rg | 0.3 | 1.5 | 3 | Ω | f = 1 MHz, N-Ch | 2 |
| Gate Resistance | Rg | 1.3 | 6.4 | 12.8 | Ω | f = 1 MHz, P-Ch | 2 |
| Turn-On Delay Time (VGEN = 10 V) | td(on) | | 7 | 14 | ns | VDD = 20 V, RL = 2 Ω, ID ≅ 10 A, VGEN = 10 V, Rg = 1 Ω, N-Ch | 3 |
| Turn-On Delay Time (VGEN = 10 V) | td(on) | | 9 | 18 | ns | VDD = -20 V, RL = 2 Ω, ID ≅ -10 A, VGEN = -10 V, Rg = 1 Ω, P-Ch | 3 |
| Rise Time (VGEN = 10 V) | tr | | 10 | 20 | ns | VDD = 20 V, RL = 2 Ω, ID ≅ 10 A, VGEN = 10 V, Rg = 1 Ω, N-Ch | 3 |
| Rise Time (VGEN = 10 V) | tr | | 9 | 18 | ns | VDD = -20 V, RL = 2 Ω, ID ≅ -10 A, VGEN = -10 V, Rg = 1 Ω, P-Ch | 3 |
| Turn-Off Delay Time (VGEN = 10 V) | td(off) | | 18 | 36 | ns | VDD = 20 V, RL = 2 Ω, ID ≅ 10 A, VGEN = 10 V, Rg = 1 Ω, N-Ch | 3 |
| Turn-Off Delay Time (VGEN = 10 V) | td(off) | | 50 | 90 | ns | VDD = -20 V, RL = 2 Ω, ID ≅ -10 A, VGEN = -10 V, Rg = 1 Ω, P-Ch | 3 |
| Fall Time (VGEN = 10 V) | tf | | 9 | 18 | ns | VDD = 20 V, RL = 2 Ω, ID ≅ 10 A, VGEN = 10 V, Rg = 1 Ω, N-Ch | 3 |
| Fall Time (VGEN = 10 V) | tf | | 14 | 28 | ns | VDD = -20 V, RL = 2 Ω, ID ≅ -10 A, VGEN = -10 V, Rg = 1 Ω, P-Ch | 3 |
| Body Diode Voltage | VSD | | 0.74 | 1.2 | V | IS = 2 A, N-Ch | 3 |
| Body Diode Voltage | VSD | | -0.77 | -1.2 | V | IS = -2 A, P-Ch | 3 |
| Body Diode Reverse Recovery Time | trr | | 17 | 34 | ns | IF = 5 A, dI/dt = 100 A/µs, TJ = 25 °C, N-Ch | 3 |
| Body Diode Reverse Recovery Time | trr | | 30 | 60 | ns | IF = -5 A, dI/dt = -100 A/µs, TJ = 25 °C, P-Ch | 3 |
| Body Diode Reverse Recovery Charge | Qrr | | 10 | 20 | nC | | 3 |
| Body Diode Reverse Recovery Charge | Qrr | | 26 | 52 | nC | | 3 |
## CAD (KiCad official)
- Symbol: `SI4564DY-T1-GE3`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files: `si4564dy-t1-ge3-etched.step` / `si4564dy-t1-ge3-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `si4564dy-t1-ge3.step` / `si4564dy-t1-ge3.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Vishay Intertech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589041833577467905) (14 pp, sha256 `95fa0aa98a6274a6`, retrieved 2026-10-21, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/si4564dy-t1-ge3-datasheet.pdf)