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Contents

README

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SI4554DY

TECH PUBLIC · MOSFETs · SOIC-8

SI4554DY from TECH PUBLIC, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S1 passive Source of the N-channel MOSFET (VDS 40V, ID 8A, RDS(ON) <19mΩ at VGS=10V).
2 G1 input Gate of the N-channel MOSFET (VGS ±20V max, threshold 1V min to 2.0V max at ID=250µA).
3 S2 passive Source of the P-channel MOSFET (VDS -40V, ID -7A, RDS(ON) <35mΩ at VGS=-10V).
4 G2 input Gate of the P-channel MOSFET (VGS ±20V max).
5 D2 passive Drain of the P-channel MOSFET (VDS -40V, pulsed IDM -30A), tied to pin 6.
6 D2 passive Drain of the P-channel MOSFET (VDS -40V, pulsed IDM -30A), tied to pin 5.
7 D1 passive Drain of the N-channel MOSFET (VDS 40V, pulsed IDM 40A), tied to pin 8.
8 D1 passive Drain of the N-channel MOSFET (VDS 40V, pulsed IDM 40A), tied to pin 7.

Key specifications

Parameter Value
Manufacturer TECH PUBLIC
Package SOIC-8
Category Transistors/Thyristors
Pins 8

CAD (KiCad official)

  • Symbol: SI4554DY
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: si4554dy-etched.step / si4554dy-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); si4554dy.step / si4554dy.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TECH PUBLIC datasheet (9 pp, sha256 5a27352d6325020b, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF