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SI4497DY-T1-GE3
Public Made by Adomby adom
Vishay Intertech MOSFETs, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSI4497DY-T1-GE3
Vishay Intertech · MOSFETs · SO-8
SI4497DY-T1-GE3 from Vishay Intertech, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source terminal of the P-channel MOSFET; drain-source voltage rated -30 V. |
| 2 | S | passive | Source terminal of the P-channel MOSFET; drain-source voltage rated -30 V. |
| 3 | S | passive | Source terminal of the P-channel MOSFET; drain-source voltage rated -30 V. |
| 4 | G | input | Gate terminal; gate-source voltage limit is ±20 V, with RDS(on) specified at VGS = -10 V and -4.5 V. |
| 5 | D | passive | Drain terminal; continuous drain current -36 A at TC = 25 °C, pulsed -70 A. |
| 6 | D | passive | Drain terminal; continuous drain current -36 A at TC = 25 °C, pulsed -70 A. |
| 7 | D | passive | Drain terminal; continuous drain current -36 A at TC = 25 °C, pulsed -70 A. |
| 8 | D | passive | Drain terminal; continuous drain current -36 A at TC = 25 °C, pulsed -70 A. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Vishay Intertech |
| Package | SO-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDS | -30 | V | 1 | |||
| Gate-Source Voltage | VGS | -20 | 20 | V | 1 | ||
| Continuous Drain Current | ID | -36 | A | TJ = 150 °C; TC = 25 °C | 1 | ||
| Continuous Drain Current | ID | -29 | A | TJ = 150 °C; TC = 70 °C | 1 | ||
| Continuous Drain Current | ID | -24.8 | A | TA = 25 °C (notes a, b) | 1 | ||
| Continuous Drain Current | ID | -19.2 | A | TA = 70 °C (notes a, b) | 1 | ||
| Pulsed Drain Current | IDM | -70 | A | 1 | |||
| Continuous Source-Drain Diode Current | IS | -6.5 | A | TC = 25 °C | 1 | ||
| Continuous Source-Drain Diode Current | IS | -2.9 | A | TA = 25 °C (notes a, b) | 1 | ||
| Avalanche Current | IAS | -30 | A | L = 0.1 mH | 1 | ||
| Single-Pulse Avalanche Energy | EAS | 45 | mJ | 1 | |||
| Maximum Power Dissipation | PD | 7.8 | W | TC = 25 °C | 1 | ||
| Maximum Power Dissipation | PD | 5 | W | TC = 70 °C | 1 | ||
| Maximum Power Dissipation | PD | 3.5 | W | TA = 25 °C (notes a, b) | 1 | ||
| Maximum Power Dissipation | PD | 2.2 | W | TA = 70 °C (notes a, b) | 1 | ||
| Operating Junction and Storage Temperature Range | TJ, Tstg | -55 | 150 | °C | 1 | ||
| Maximum Junction-to-Ambient | RthJA | 29 | 35 | °C/W | t ≤ 10 s (note b) | 1 | |
| Maximum Junction-to-Ambient | RthJA | 80 | °C/W | Steady state (note c) | 1 | ||
| Maximum Junction-to-Foot Steady State | RthJF | 13 | 16 | °C/W | Steady state | 1 | |
| Drain-Source Breakdown Voltage | VDS | -30 | V | VGS = 0 V, ID = -250 µA | 2 | ||
| Gate-Source Threshold Voltage | VGS(th) | -1 | -2.5 | V | VDS = VGS, ID = -250 µA | 2 | |
| Gate-Source Leakage | IGSS | -100 | 100 | nA | VDS = 0 V, VGS = ±20 V | 2 | |
| Zero Gate Voltage Drain Current | IDSS | -1 | µA | VDS = -30 V, VGS = 0 V | 2 | ||
| Zero Gate Voltage Drain Current | IDSS | -5 | µA | VDS = -30 V, VGS = 0 V, TJ = 55 °C | 2 | ||
| On-State Drain Current | ID(on) | -30 | A | VDS ≥ -10 V, VGS = -10 V | 2 | ||
| Drain-Source On-State Resistance | RDS(on) | 0.0027 | 0.0033 | Ω | VGS = -10 V, ID = -20 A | 2 | |
| Drain-Source On-State Resistance | RDS(on) | 0.0038 | 0.0046 | Ω | VGS = -4.5 V, ID = -15 A | 2 | |
| Total Gate Charge | Qg | 190 | 285 | nC | VDS = -15 V, VGS = -10 V, ID = -20 A | 2 | |
| Total Gate Charge | Qg | 90 | 135 | nC | VDS = -15 V, VGS = -4.5 V, ID = -20 A | 2 | |
| Gate Resistance | Rg | 0.5 | 2.3 | 4.6 | Ω | f = 1 MHz | 2 |
| Turn-On Delay Time | td(on) | 19 | 35 | ns | VDD = -15 V, RL = 1.5 Ω, ID ≅ -10 A, VGEN = -10 V, Rg = 1 Ω | 2 | |
| Rise Time | tr | 13 | 25 | ns | VDD = -15 V, RL = 1.5 Ω, ID ≅ -10 A, VGEN = -10 V, Rg = 1 Ω | 2 | |
| Turn-Off Delay Time | td(off) | 115 | 200 | ns | VDD = -15 V, RL = 1.5 Ω, ID ≅ -10 A, VGEN = -10 V, Rg = 1 Ω | 2 | |
| Fall Time | tf | 25 | 50 | ns | VDD = -15 V, RL = 1.5 Ω, ID ≅ -10 A, VGEN = -10 V, Rg = 1 Ω | 2 | |
| Turn-On Delay Time | td(on) | 100 | 180 | ns | VDD = -15 V, RL = 1.5 Ω, ID ≅ -10 A, VGEN = -4.5 V, Rg = 1 Ω | 2 | |
| Rise Time | tr | 75 | 150 | ns | VDD = -15 V, RL = 1.5 Ω, ID ≅ -10 A, VGEN = -4.5 V, Rg = 1 Ω | 2 | |
| Turn-Off Delay Time | td(off) | 100 | 180 | ns | VDD = -15 V, RL = 1.5 Ω, ID ≅ -10 A, VGEN = -4.5 V, Rg = 1 Ω | 2 | |
| Fall Time | tf | 42 | 80 | ns | VDD = -15 V, RL = 1.5 Ω, ID ≅ -10 A, VGEN = -4.5 V, Rg = 1 Ω | 2 | |
| Body Diode Voltage | VSD | -0.7 | -1.2 | V | IS = -3 A, VGS = 0 V | 2 | |
| Body Diode Reverse Recovery Time | trr | 31 | 60 | ns | IF = -10 A, dI/dt = 100 A/µs, TJ = 25 °C | 2 | |
| Body Diode Reverse Recovery Charge | Qrr | 23 | 45 | nC | IF = -10 A, dI/dt = 100 A/µs, TJ = 25 °C | 2 |
CAD (KiCad official)
- Symbol:
SI4497DY-T1-GE3 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files:
si4497dy-t1-ge3-etched.step/si4497dy-t1-ge3-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);si4497dy-t1-ge3.step/si4497dy-t1-ge3.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Vishay Intertech datasheet (7 pp, sha256
57e2887e6065941d, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).