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SI4491EDY-T1-E3-VB

VBsemi Elec · MOSFETs · SO-8

SI4491EDY-T1-E3-VB from VBsemi Elec, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S passive Source of the P-channel MOSFET, one of three source pins (1-3) tied together; continuous drain current is -11 A at TA = 25 °C.
2 S passive Source of the P-channel MOSFET, one of three source pins (1-3) tied together; continuous source-drain diode current is -2.8 A at TA = 25 °C.
3 S passive Source of the P-channel MOSFET, one of three source pins (1-3) tied together; RDS(on) is 0.0050 Ω at VGS = 10 V.
4 G input Gate of the P-channel MOSFET with gate-source voltage rated at ±20 V.
5 D passive Drain of the P-channel MOSFET, one of four drain pins (5-8) tied together; VDS rated -30 V.
6 D passive Drain of the P-channel MOSFET, one of four drain pins (5-8) tied together; pulsed drain current is -145 A (t = 100 μs).
7 D passive Drain of the P-channel MOSFET, one of four drain pins (5-8) tied together; continuous drain current is -18 A at TC = 25 °C.
8 D passive Drain of the P-channel MOSFET, one of four drain pins (5-8) tied together; junction-to-case (drain) thermal resistance is 18 °C/W typical.

Key specifications

Parameter Value
Manufacturer VBsemi Elec
Package SO-8
Category Triode/MOS Tube/Transistor
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-source breakdown voltage VDS -30 V VGS = 0 V, ID = -250 μA 2
Gate-source threshold voltage VGS(th) -1 -2.2 V VDS = VGS, ID = 250 μA 2
Gate-source leakage IGSS 100 nA VDS = 0 V, VGS = +16 / -20 V 2
Zero gate voltage drain current IDSS -1 μA VDS = -30 V, VGS = 0 V 2
Zero gate voltage drain current IDSS -15 μA VDS = -30 V, VGS = 0 V, TJ = 70 °C 2
On-state drain current ID(on) -40 A VDS ≤ -10 V, VGS = -10 V 2
Total gate charge Qg 56 84 nC VDS = -15 V, VGS = -10 V, ID = -10 A 2
Gate resistance Rg 1.5 3.5 6 Ω f = 1 MHz 2
Turn-on delay time td(on) 15 30 ns VDD = -15 V, RL = 1.5 Ω, VGEN = -10 V, Rg = 1 Ω 2
Rise time tr 6 12 ns VDD = -15 V, RL = 1.5 Ω, VGEN = -10 V, Rg = 1 Ω 2
Turn-off delay time td(off) 39 78 ns VDD = -15 V, RL = 1.5 Ω, VGEN = -10 V, Rg = 1 Ω 2
Fall time tf 10 20 ns VDD = -15 V, RL = 1.5 Ω, VGEN = -10 V, Rg = 1 Ω 2
Turn-on delay time td(on) 34 68 ns VDD = -15 V, RL = 1.5 Ω, VGEN = -4.5 V, Rg = 1 Ω 2
Rise time tr 86 172 ns VDD = -15 V, RL = 1.5 Ω, VGEN = -4.5 V, Rg = 1 Ω 2
Turn-off delay time td(off) 31 62 ns VDD = -15 V, RL = 1.5 Ω, VGEN = -4.5 V, Rg = 1 Ω 2
Fall time tf 22 44 ns VDD = -15 V, RL = 1.5 Ω, VGEN = -4.5 V, Rg = 1 Ω 2
Continuous source-drain diode current IS -5 A TC = 25 °C 2
Pulse diode forward current ISM -150 A 2
Body diode voltage VSD -0.73 -1.1 V IS = -5 A, VGS = 0 V 2
Body diode reverse recovery time trr 44 88 ns IF = -10 A, di/dt = 100 A/μs, TJ = 25 °C 2
Body diode reverse recovery charge Qrr 41 82 nC IF = -10 A, di/dt = 100 A/μs, TJ = 25 °C 2
Drain-source voltage VDS -30 V TA = 25 °C 1
Gate-source voltage VGS -20 20 V TA = 25 °C 1
Continuous drain current ID -18 A TC = 25 °C, TJ = 150 °C 1
Continuous drain current ID -13 A TC = 70 °C 1
Continuous drain current ID -11 A TA = 25 °C 1
Continuous drain current ID -8 A TA = 70 °C 1
Pulsed drain current IDM -145 A t = 100 μs 1
Continuous source-drain diode current IS -5 A TC = 25 °C 1
Continuous source-drain diode current IS -2.8 A TA = 25 °C 1
Single pulse avalanche current IAS -25 A L = 0.1 mH 1
Single pulse avalanche energy EAS 31.2 mJ L = 0.1 mH 1
Maximum power dissipation PD 5.6 W TC = 25 °C 1
Maximum power dissipation PD 3.6 W TC = 70 °C 1
Maximum power dissipation PD 3.1 W TA = 25 °C 1
Maximum power dissipation PD 2 W TA = 70 °C 1
Operating junction and storage temperature range TJ, Tstg -55 150 °C 1
Maximum junction-to-ambient RthJA 34 40 °C/W t ≤ 10 s 1
Maximum junction-to-case (drain) RthJF 18 22 °C/W Steady state 1
Drain-source on-state resistance RDS(on) 0.005 Ω VGS = -10 V, ID = -15 A 2
Drain-source on-state resistance RDS(on) 0.008 Ω VGS = -4.5 V, ID = -10 A 2
Forward transconductance gfs 81 S VDS = -15 V, ID = -15 A 2
Input capacitance Ciss 3490 pF VDS = -15 V, VGS = 0 V, f = 1 MHz 2
Output capacitance Coss 1420 pF VDS = -15 V, VGS = 0 V, f = 1 MHz 2
Reverse transfer capacitance Crss 70 pF VDS = -15 V, VGS = 0 V, f = 1 MHz 2

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts copper d. The SO-8 is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation 1

CAD (KiCad official)

  • Symbol: SI4491EDY-T1-E3-VB
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: si4491edy-t1-e3-vb-etched.step / si4491edy-t1-e3-vb-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); si4491edy-t1-e3-vb.step / si4491edy-t1-e3-vb.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: VBsemi Elec datasheet (9 pp, sha256 0a46cf2bfbb79ba3, retrieved 2026-10-27, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF