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SI4468-A2A-IM
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SILICON LABS RF Transceiver ICs, QFN-20(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SI4468-A2A-IM
SILICON LABS · RF Transceiver ICs · QFN-20(4x4)
SI4468-A2A-IM from SILICON LABS, in a QFN-20(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SDN | input | Shutdown input (0-VDD V digital): SDN must be 0 in all modes except Shutdown, and when SDN=1 the chip is fully shut down and register contents are lost. |
| 2 | RXp | input | Differential RF input pin of the LNA; see the application schematic for the example matching network. |
| 3 | RXn | input | Differential RF input pin of the LNA; see the application schematic for the example matching network. |
| 4 | TX | output | Transmit output pin; the PA output is open-drain, so the L-C match must supply VDD (+3.3 VDC nominal) to this pin. |
| 5 | NC | unconnected | Not connected internally to any circuitry; recommended to connect to GND per the reference design schematic. |
| 6 | VDD | power_in | Supply voltage input to internal regulators, +1.8 to +3.8 V, with recommended supply of +3.3 V. |
| 7 | TXRAMP | output | Programmable bias output with ramp capability for an external FET PA. |
| 8 | VDD | power_in | Supply voltage input to internal regulators, +1.8 to +3.8 V, with recommended supply of +3.3 V. |
| 9 | GPIO0 | bidirectional | General purpose digital I/O configurable through registers for functions such as MCU clock output, FIFO status, POR, wake-up timer, low battery detect, TRSW and antenna diversity control. |
| 10 | GPIO1 | bidirectional | General purpose digital I/O; the datasheet gives no separate function list for this pin. |
| 11 | nIRQ | output | General microcontroller interrupt status output, set low when an interrupt event occurs; no external pull-up is required, though one may be desirable with multiple interrupt lines. |
| 12 | SCLK | input | Serial clock input (0-VDD V digital) for the 4-line serial bus; data is clocked in on positive edge transitions. |
| 13 | SDO | output | Serial data readback output (0-VDD V digital) of the internal control registers. |
| 14 | SDI | input | Serial data input (0-VDD V digital) for the 4-line serial data bus. |
| 15 | nSEL | input | Serial interface select input (0-VDD V digital) providing the select/enable function for the 4-line serial bus. |
| 16 | XOUT | output | Crystal oscillator output; connect to an external 25 to 32 MHz crystal, or leave floating when driving with an external source on XIN. |
| 17 | XIN | input | Crystal oscillator input; connect to an external 25 to 32 MHz crystal or to an external source. |
| 18 | GND | power_in | Ground: leave floating per the reference design when using an XTAL; when using a TCXO, connect to TCXO GND, which should be separate from the board reference ground plane. |
| 19 | GPIO2 | bidirectional | General purpose digital I/O configurable through registers for functions such as MCU clock output, FIFO status, POR, wake-up timer, low battery detect, TRSW and antenna diversity control. |
| 20 | GPIO3 | bidirectional | General purpose digital I/O; the datasheet gives no separate function list for this pin. |
| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | SILICON LABS |
| Package | QFN-20(4x4) |
| Category | Radio Frequency Chip/Antenna |
| Pins | 21 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage Range | VDD | 1.8 | 3.3 | 3.8 | V | 4 | |
| Shutdown Current | IShutdown | 30 | 1300 | nA | RC Oscillator, Main Digital Regulator, and Low Power Digital Regulator OFF | 4 | |
| Standby Current | IStandby | 40 | 2900 | nA | Register values maintained and RC oscillator/WUT OFF | 4 | |
| Sleep Current RC | ISleepRC | 740 | 3800 | nA | RC Oscillator/WUT ON and all register values maintained, and all other blocks OFF | 4 | |
| RX Mode Current High Performance | IRXH | 13.7 | 22 | mA | High Performance Mode, measured at 915 MHz and 40 kbps data rate | 4 | |
| TX Mode Current (Si4468) +20 dBm Class-E 915 MHz | ITX_+20 | 88 | 108 | mA | +20 dBm output power, Class-E match, 915 MHz, 3.3 V | 4 | |
| TX Mode Current (Si4468) +20 dBm square-wave 169 MHz | ITX_+20 | 68.5 | 80 | mA | +20 dBm output power, square-wave match, 169 MHz, 3.3 V | 4 | |
| TX Mode Current (Si4468) +13 dBm Class-E 915 MHz | ITX_+13 | 44.5 | 60 | mA | +13 dBm output power, Class-E match, 915 MHz, 3.3 V | 4 | |
| Digital Input Current | IIN | -1 | 1 | µA | 0<VIN<VDD | 12 | |
| Output Power Range (Si4468) | PTX68 | -20 | 20 | dBm | Typical range at 3.3 V | 9 | |
| Supply Voltage to GND | VDD | -0.3 | 3.8 | V | VDD to GND | 13 | |
| Instantaneous VRF-peak to GND on TX Output Pin | VRF-peak | -0.3 | 8 | V | Instantaneous VRF-peak to GND on TX Output Pin | 13 | |
| Sustained VRF-peak to GND on TX Output Pin | VRF-peak | -0.3 | 6.5 | V | Sustained VRF-peak to GND on TX Output Pin | 13 | |
| RX Input Power | 10 | dBm | RX Input Power | 13 | |||
| Operating Ambient Temperature Range | TA | -40 | 125 | °C | Operating Ambient Temperature Range | 13 | |
| Thermal Impedance Junction to Ambient | JA | 25 | °C/W | Based on RF evaluation board measurements | 13 | ||
| Junction Temperature Maximum | Tj | 137 | °C | Junction Temperature Maximum Value, based on RF evaluation board measurements | 13 | ||
| Storage Temperature Range | TSTG | -55 | 150 | °C | Storage Temperature Range | 13 |
CAD (KiCad official)
- Symbol:
SI4468-A2A-IM - Footprint:
Package_DFN_QFN:QFN-20-1EP_4x4mm_P0.5mm_EP2.5x2.5mm - 3D model: QFN-20(4x4) (KiCad packages3D, STEP)
- 3D model files:
si4468-a2a-im-etched.step/si4468-a2a-im-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);si4468-a2a-im.step/si4468-a2a-im.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: SILICON LABS datasheet (57 pp, sha256
e717e10d43adad92, retrieved 2026-11-02, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SI4468-A2A-IM
**SILICON LABS** · RF Transceiver ICs · QFN-20(4x4)
SI4468-A2A-IM from SILICON LABS, in a QFN-20(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SDN | input | Shutdown input (0-VDD V digital): SDN must be 0 in all modes except Shutdown, and when SDN=1 the chip is fully shut down and register contents are lost. |
| 2 | RXp | input | Differential RF input pin of the LNA; see the application schematic for the example matching network. |
| 3 | RXn | input | Differential RF input pin of the LNA; see the application schematic for the example matching network. |
| 4 | TX | output | Transmit output pin; the PA output is open-drain, so the L-C match must supply VDD (+3.3 VDC nominal) to this pin. |
| 5 | NC | unconnected | Not connected internally to any circuitry; recommended to connect to GND per the reference design schematic. |
| 6 | VDD | power_in | Supply voltage input to internal regulators, +1.8 to +3.8 V, with recommended supply of +3.3 V. |
| 7 | TXRAMP | output | Programmable bias output with ramp capability for an external FET PA. |
| 8 | VDD | power_in | Supply voltage input to internal regulators, +1.8 to +3.8 V, with recommended supply of +3.3 V. |
| 9 | GPIO0 | bidirectional | General purpose digital I/O configurable through registers for functions such as MCU clock output, FIFO status, POR, wake-up timer, low battery detect, TRSW and antenna diversity control. |
| 10 | GPIO1 | bidirectional | General purpose digital I/O; the datasheet gives no separate function list for this pin. |
| 11 | nIRQ | output | General microcontroller interrupt status output, set low when an interrupt event occurs; no external pull-up is required, though one may be desirable with multiple interrupt lines. |
| 12 | SCLK | input | Serial clock input (0-VDD V digital) for the 4-line serial bus; data is clocked in on positive edge transitions. |
| 13 | SDO | output | Serial data readback output (0-VDD V digital) of the internal control registers. |
| 14 | SDI | input | Serial data input (0-VDD V digital) for the 4-line serial data bus. |
| 15 | nSEL | input | Serial interface select input (0-VDD V digital) providing the select/enable function for the 4-line serial bus. |
| 16 | XOUT | output | Crystal oscillator output; connect to an external 25 to 32 MHz crystal, or leave floating when driving with an external source on XIN. |
| 17 | XIN | input | Crystal oscillator input; connect to an external 25 to 32 MHz crystal or to an external source. |
| 18 | GND | power_in | Ground: leave floating per the reference design when using an XTAL; when using a TCXO, connect to TCXO GND, which should be separate from the board reference ground plane. |
| 19 | GPIO2 | bidirectional | General purpose digital I/O configurable through registers for functions such as MCU clock output, FIFO status, POR, wake-up timer, low battery detect, TRSW and antenna diversity control. |
| 20 | GPIO3 | bidirectional | General purpose digital I/O; the datasheet gives no separate function list for this pin. |
| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | SILICON LABS |
| Package | QFN-20(4x4) |
| Category | Radio Frequency Chip/Antenna |
| Pins | 21 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage Range | VDD | 1.8 | 3.3 | 3.8 | V | | 4 |
| Shutdown Current | IShutdown | | 30 | 1300 | nA | RC Oscillator, Main Digital Regulator, and Low Power Digital Regulator OFF | 4 |
| Standby Current | IStandby | | 40 | 2900 | nA | Register values maintained and RC oscillator/WUT OFF | 4 |
| Sleep Current RC | ISleepRC | | 740 | 3800 | nA | RC Oscillator/WUT ON and all register values maintained, and all other blocks OFF | 4 |
| RX Mode Current High Performance | IRXH | | 13.7 | 22 | mA | High Performance Mode, measured at 915 MHz and 40 kbps data rate | 4 |
| TX Mode Current (Si4468) +20 dBm Class-E 915 MHz | ITX_+20 | | 88 | 108 | mA | +20 dBm output power, Class-E match, 915 MHz, 3.3 V | 4 |
| TX Mode Current (Si4468) +20 dBm square-wave 169 MHz | ITX_+20 | | 68.5 | 80 | mA | +20 dBm output power, square-wave match, 169 MHz, 3.3 V | 4 |
| TX Mode Current (Si4468) +13 dBm Class-E 915 MHz | ITX_+13 | | 44.5 | 60 | mA | +13 dBm output power, Class-E match, 915 MHz, 3.3 V | 4 |
| Digital Input Current | IIN | -1 | | 1 | µA | 0<VIN<VDD | 12 |
| Output Power Range (Si4468) | PTX68 | -20 | | 20 | dBm | Typical range at 3.3 V | 9 |
| Supply Voltage to GND | VDD | -0.3 | | 3.8 | V | VDD to GND | 13 |
| Instantaneous VRF-peak to GND on TX Output Pin | VRF-peak | -0.3 | | 8 | V | Instantaneous VRF-peak to GND on TX Output Pin | 13 |
| Sustained VRF-peak to GND on TX Output Pin | VRF-peak | -0.3 | | 6.5 | V | Sustained VRF-peak to GND on TX Output Pin | 13 |
| RX Input Power | | | | 10 | dBm | RX Input Power | 13 |
| Operating Ambient Temperature Range | TA | -40 | | 125 | °C | Operating Ambient Temperature Range | 13 |
| Thermal Impedance Junction to Ambient | JA | | 25 | | °C/W | Based on RF evaluation board measurements | 13 |
| Junction Temperature Maximum | Tj | | | 137 | °C | Junction Temperature Maximum Value, based on RF evaluation board measurements | 13 |
| Storage Temperature Range | TSTG | -55 | | 150 | °C | Storage Temperature Range | 13 |
## CAD (KiCad official)
- Symbol: `SI4468-A2A-IM`
- Footprint: `Package_DFN_QFN:QFN-20-1EP_4x4mm_P0.5mm_EP2.5x2.5mm`
- 3D model: QFN-20(4x4) (KiCad packages3D, STEP)
- 3D model files: `si4468-a2a-im-etched.step` / `si4468-a2a-im-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `si4468-a2a-im.step` / `si4468-a2a-im.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [SILICON LABS datasheet](docs/si4468-a2a-im-datasheet.pdf) (57 pp, sha256 `e717e10d43adad92`, retrieved 2026-11-02, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/si4468-a2a-im-datasheet.pdf)