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Contents

README

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SI4455DY

TECH PUBLIC · MOSFETs · SOIC-8

SI4455DY from TECH PUBLIC, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S passive Source of the P-channel MOSFET (pin 1 on the SOP-8 top view).
2 S passive Source of the P-channel MOSFET (pin 2 on the SOP-8 top view).
3 S passive Source of the P-channel MOSFET (pin 3 on the SOP-8 top view).
4 G input Gate of the P-channel MOSFET; VGS rated ±20 V absolute maximum, with ESD-protected gate.
5 D passive Drain of the P-channel MOSFET; VDS rated -150 V absolute maximum.
6 D passive Drain of the P-channel MOSFET; VDS rated -150 V absolute maximum.
7 D passive Drain of the P-channel MOSFET; VDS rated -150 V absolute maximum.
8 D passive Drain of the P-channel MOSFET; VDS rated -150 V absolute maximum.

Key specifications

Parameter Value
Manufacturer TECH PUBLIC
Package SOIC-8
Category Transistors/Thyristors
Pins 8

CAD (KiCad official)

  • Symbol: SI4455DY
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: si4455dy-etched.step / si4455dy-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); si4455dy.step / si4455dy.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TECH PUBLIC datasheet (6 pp, sha256 6707f143d7e661fa, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF