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SI4204DY-T1-GE3
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Vishay Intertech MOSFETs, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SI4204DY-T1-GE3
Vishay Intertech · MOSFETs · SO-8
SI4204DY-T1-GE3 from Vishay Intertech, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source of N-channel MOSFET 1; the device is rated for VDS of 20 V maximum. |
| 2 | G1 | input | Gate of N-channel MOSFET 1; VGS is rated at ±20 V maximum. |
| 3 | S2 | passive | Source of N-channel MOSFET 2; the device is rated for VDS of 20 V maximum. |
| 4 | G2 | input | Gate of N-channel MOSFET 2; VGS is rated at ±20 V maximum. |
| 5 | D2 | passive | Drain of N-channel MOSFET 2; the device is rated for VDS of 20 V maximum. |
| 6 | D2 | passive | Drain of N-channel MOSFET 2 (second drain pin, internally common with pin 5); VDS rated at 20 V maximum. |
| 7 | D1 | passive | Drain of N-channel MOSFET 1; the device is rated for VDS of 20 V maximum. |
| 8 | D1 | passive | Drain of N-channel MOSFET 1 (second drain pin, internally common with pin 7); VDS rated at 20 V maximum. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Vishay Intertech |
| Package | SO-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDS | 20 | V | 1 | |||
| Gate-Source Voltage | VGS | -20 | 20 | V | 1 | ||
| Continuous Drain Current | ID | 19.8 | A | TJ = 150 °C, TC = 25 °C | 1 | ||
| Continuous Drain Current | ID | 15.9 | A | TJ = 150 °C, TC = 70 °C | 1 | ||
| Continuous Drain Current | ID | 15.5 | A | TA = 25 °C (notes b, c) | 1 | ||
| Continuous Drain Current | ID | 12.2 | A | TA = 70 °C (notes b, c) | 1 | ||
| Pulsed Drain Current | IDM | 50 | A | 10 µs pulse width | 1 | ||
| Source-Drain Current Diode Current | IS | 2.7 | A | TC = 25 °C | 1 | ||
| Source-Drain Current Diode Current | IS | 1.6 | A | TA = 25 °C (notes b, c) | 1 | ||
| Pulsed Source-Drain Current | ISM | 50 | A | 1 | |||
| Single Pulse Avalanche Current | IAS | 20 | A | L = 0.1 mH | 1 | ||
| Single Pulse Avalanche Energy | EAS | 20 | 1 | ||||
| Maximum Power Dissipation | PD | 3.25 | W | TC = 25 °C | 1 | ||
| Maximum Power Dissipation | PD | 2.1 | W | TC = 70 °C | 1 | ||
| Maximum Power Dissipation | PD | 2 | W | TA = 25 °C (notes b, c) | 1 | ||
| Maximum Power Dissipation | PD | 1.25 | W | TA = 70 °C (notes b, c) | 1 | ||
| Operating Junction and Storage Temperature Range | TJ, Tstg | -55 | 150 | °C | 1 | ||
| Maximum Junction-to-Ambient | RthJA | 45 | 62.5 | °C/W | t ≤ 10 s (notes b, d) | 1 | |
| Maximum Junction-to-Foot (Drain) Steady-State | RthJF | 29 | 38 | °C/W | Steady state | 1 | |
| Drain-Source Breakdown Voltage | VDS | 20 | V | VGS = 0 V, ID = 250 µA | 2 | ||
| Gate Threshold Voltage | VGS(th) | 1 | 2.4 | V | VDS = VGS, ID = 250 µA | 2 | |
| Gate-Body Leakage | IGSS | 100 | nA | VDS = 0 V, VGS = ± 20 V | 2 | ||
| Zero Gate Voltage Drain Current | IDSS | 1 | µA | VDS = 20 V, VGS = 0 V | 2 | ||
| Zero Gate Voltage Drain Current | IDSS | 10 | µA | VDS = 20 V, VGS = 0 V, TJ = 55 °C | 2 | ||
| On-State Drain Current | ID(on) | 20 | A | VDS = 5 V, VGS = 10 V | 2 | ||
| Drain-Source On-State Resistance | RDS(on) | 0.0038 | 0.0046 | Ω | VGS = 10 V, ID = 10 A | 2 | |
| Drain-Source On-State Resistance | RDS(on) | 0.0047 | 0.006 | Ω | VGS = 4.5 V, ID = 8 A | 2 | |
| Total Gate Charge | Qg | 30 | 45 | nC | VDS = 10 V, VGS = 10 V, ID = 10 A | 2 | |
| Total Gate Charge | Qg | 14.5 | 22 | nC | VDS = 10 V, VGS = 4.5 V, ID = 10 A | 2 | |
| Gate Resistance | Rg | 0.4 | 1.4 | 2.8 | Ω | f = 1 MHz | 2 |
| Turn-On Delay Time | td(on) | 8 | 16 | ns | VDD = 10 V, RL = 1 Ω, ID ≅ 10 A, VGEN = 10 V, Rg = 1 Ω | 2 | |
| Rise Time | tr | 15 | 30 | ns | VDD = 10 V, RL = 1 Ω, ID ≅ 10 A, VGEN = 10 V, Rg = 1 Ω | 2 | |
| Turn-Off Delay Time | td(off) | 24 | 45 | ns | VDD = 10 V, RL = 1 Ω, ID ≅ 10 A, VGEN = 10 V, Rg = 1 Ω | 2 | |
| Fall Time | tf | 9 | 18 | ns | VDD = 10 V, RL = 1 Ω, ID ≅ 10 A, VGEN = 10 V, Rg = 1 Ω | 2 | |
| Turn-On Delay Time | td(on) | 18 | 35 | ns | VDD = 10 V, RL = 1 Ω, ID ≅ 10 A, VGEN = 4.5 V, Rg = 1 Ω | 2 | |
| Rise Time | tr | 24 | 45 | ns | VDD = 10 V, RL = 1 Ω, ID ≅ 10 A, VGEN = 4.5 V, Rg = 1 Ω | 2 | |
| Turn-Off Delay Time | td(off) | 26 | 50 | ns | VDD = 10 V, RL = 1 Ω, ID ≅ 10 A, VGEN = 4.5 V, Rg = 1 Ω | 2 | |
| Fall Time | tf | 13 | 26 | ns | VDD = 10 V, RL = 1 Ω, ID ≅ 10 A, VGEN = 4.5 V, Rg = 1 Ω | 2 | |
| Continuous Source-Drain Diode Current | IS | 2.7 | A | TC = 25 °C | 2 | ||
| Pulse Diode Forward Current | ISM | 50 | A | 2 | |||
| Body Diode Voltage | VSD | 0.7 | 1.2 | V | IS = 3 A | 2 | |
| Body Diode Reverse Recovery Time | trr | 20 | 40 | ns | IF = 10 A, dI/dt = 100 A/µs, TJ = 25 °C | 2 | |
| Body Diode Reverse Recovery Charge | Qrr | 10 | 20 | nC | IF = 10 A, dI/dt = 100 A/µs, TJ = 25 °C | 2 |
CAD (KiCad official)
- Symbol:
SI4204DY-T1-GE3 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files:
si4204dy-t1-ge3-etched.step/si4204dy-t1-ge3-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);si4204dy-t1-ge3.step/si4204dy-t1-ge3.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Vishay Intertech datasheet (9 pp, sha256
c002546d54d846d4, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SI4204DY-T1-GE3
**Vishay Intertech** · MOSFETs · SO-8
SI4204DY-T1-GE3 from Vishay Intertech, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source of N-channel MOSFET 1; the device is rated for VDS of 20 V maximum. |
| 2 | G1 | input | Gate of N-channel MOSFET 1; VGS is rated at ±20 V maximum. |
| 3 | S2 | passive | Source of N-channel MOSFET 2; the device is rated for VDS of 20 V maximum. |
| 4 | G2 | input | Gate of N-channel MOSFET 2; VGS is rated at ±20 V maximum. |
| 5 | D2 | passive | Drain of N-channel MOSFET 2; the device is rated for VDS of 20 V maximum. |
| 6 | D2 | passive | Drain of N-channel MOSFET 2 (second drain pin, internally common with pin 5); VDS rated at 20 V maximum. |
| 7 | D1 | passive | Drain of N-channel MOSFET 1; the device is rated for VDS of 20 V maximum. |
| 8 | D1 | passive | Drain of N-channel MOSFET 1 (second drain pin, internally common with pin 7); VDS rated at 20 V maximum. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Vishay Intertech |
| Package | SO-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDS | | | 20 | V | | 1 |
| Gate-Source Voltage | VGS | -20 | | 20 | V | | 1 |
| Continuous Drain Current | ID | | | 19.8 | A | TJ = 150 °C, TC = 25 °C | 1 |
| Continuous Drain Current | ID | | | 15.9 | A | TJ = 150 °C, TC = 70 °C | 1 |
| Continuous Drain Current | ID | | | 15.5 | A | TA = 25 °C (notes b, c) | 1 |
| Continuous Drain Current | ID | | | 12.2 | A | TA = 70 °C (notes b, c) | 1 |
| Pulsed Drain Current | IDM | | | 50 | A | 10 µs pulse width | 1 |
| Source-Drain Current Diode Current | IS | | | 2.7 | A | TC = 25 °C | 1 |
| Source-Drain Current Diode Current | IS | | | 1.6 | A | TA = 25 °C (notes b, c) | 1 |
| Pulsed Source-Drain Current | ISM | | | 50 | A | | 1 |
| Single Pulse Avalanche Current | IAS | | | 20 | A | L = 0.1 mH | 1 |
| Single Pulse Avalanche Energy | EAS | | | 20 | | | 1 |
| Maximum Power Dissipation | PD | | | 3.25 | W | TC = 25 °C | 1 |
| Maximum Power Dissipation | PD | | | 2.1 | W | TC = 70 °C | 1 |
| Maximum Power Dissipation | PD | | | 2 | W | TA = 25 °C (notes b, c) | 1 |
| Maximum Power Dissipation | PD | | | 1.25 | W | TA = 70 °C (notes b, c) | 1 |
| Operating Junction and Storage Temperature Range | TJ, Tstg | -55 | | 150 | °C | | 1 |
| Maximum Junction-to-Ambient | RthJA | | 45 | 62.5 | °C/W | t ≤ 10 s (notes b, d) | 1 |
| Maximum Junction-to-Foot (Drain) Steady-State | RthJF | | 29 | 38 | °C/W | Steady state | 1 |
| Drain-Source Breakdown Voltage | VDS | 20 | | | V | VGS = 0 V, ID = 250 µA | 2 |
| Gate Threshold Voltage | VGS(th) | 1 | | 2.4 | V | VDS = VGS, ID = 250 µA | 2 |
| Gate-Body Leakage | IGSS | | | 100 | nA | VDS = 0 V, VGS = ± 20 V | 2 |
| Zero Gate Voltage Drain Current | IDSS | | | 1 | µA | VDS = 20 V, VGS = 0 V | 2 |
| Zero Gate Voltage Drain Current | IDSS | | | 10 | µA | VDS = 20 V, VGS = 0 V, TJ = 55 °C | 2 |
| On-State Drain Current | ID(on) | 20 | | | A | VDS = 5 V, VGS = 10 V | 2 |
| Drain-Source On-State Resistance | RDS(on) | | 0.0038 | 0.0046 | Ω | VGS = 10 V, ID = 10 A | 2 |
| Drain-Source On-State Resistance | RDS(on) | | 0.0047 | 0.006 | Ω | VGS = 4.5 V, ID = 8 A | 2 |
| Total Gate Charge | Qg | | 30 | 45 | nC | VDS = 10 V, VGS = 10 V, ID = 10 A | 2 |
| Total Gate Charge | Qg | | 14.5 | 22 | nC | VDS = 10 V, VGS = 4.5 V, ID = 10 A | 2 |
| Gate Resistance | Rg | 0.4 | 1.4 | 2.8 | Ω | f = 1 MHz | 2 |
| Turn-On Delay Time | td(on) | | 8 | 16 | ns | VDD = 10 V, RL = 1 Ω, ID ≅ 10 A, VGEN = 10 V, Rg = 1 Ω | 2 |
| Rise Time | tr | | 15 | 30 | ns | VDD = 10 V, RL = 1 Ω, ID ≅ 10 A, VGEN = 10 V, Rg = 1 Ω | 2 |
| Turn-Off Delay Time | td(off) | | 24 | 45 | ns | VDD = 10 V, RL = 1 Ω, ID ≅ 10 A, VGEN = 10 V, Rg = 1 Ω | 2 |
| Fall Time | tf | | 9 | 18 | ns | VDD = 10 V, RL = 1 Ω, ID ≅ 10 A, VGEN = 10 V, Rg = 1 Ω | 2 |
| Turn-On Delay Time | td(on) | | 18 | 35 | ns | VDD = 10 V, RL = 1 Ω, ID ≅ 10 A, VGEN = 4.5 V, Rg = 1 Ω | 2 |
| Rise Time | tr | | 24 | 45 | ns | VDD = 10 V, RL = 1 Ω, ID ≅ 10 A, VGEN = 4.5 V, Rg = 1 Ω | 2 |
| Turn-Off Delay Time | td(off) | | 26 | 50 | ns | VDD = 10 V, RL = 1 Ω, ID ≅ 10 A, VGEN = 4.5 V, Rg = 1 Ω | 2 |
| Fall Time | tf | | 13 | 26 | ns | VDD = 10 V, RL = 1 Ω, ID ≅ 10 A, VGEN = 4.5 V, Rg = 1 Ω | 2 |
| Continuous Source-Drain Diode Current | IS | | | 2.7 | A | TC = 25 °C | 2 |
| Pulse Diode Forward Current | ISM | | | 50 | A | | 2 |
| Body Diode Voltage | VSD | | 0.7 | 1.2 | V | IS = 3 A | 2 |
| Body Diode Reverse Recovery Time | trr | | 20 | 40 | ns | IF = 10 A, dI/dt = 100 A/µs, TJ = 25 °C | 2 |
| Body Diode Reverse Recovery Charge | Qrr | | 10 | 20 | nC | IF = 10 A, dI/dt = 100 A/µs, TJ = 25 °C | 2 |
## CAD (KiCad official)
- Symbol: `SI4204DY-T1-GE3`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files: `si4204dy-t1-ge3-etched.step` / `si4204dy-t1-ge3-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `si4204dy-t1-ge3.step` / `si4204dy-t1-ge3.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Vishay Intertech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588886115902500865) (9 pp, sha256 `c002546d54d846d4`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/si4204dy-t1-ge3-datasheet.pdf)