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SI4190BDY-T1-GE3

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Vishay Intertech MOSFETs, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SI4190BDY-T1-GE3

Vishay Intertech · MOSFETs · SOIC-8

SI4190BDY-T1-GE3 from Vishay Intertech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S passive Source terminal of the N-channel MOSFET, rated for VDS of 100 V with VGS limited to ±20 V.
2 S passive Source terminal of the N-channel MOSFET, rated for VDS of 100 V with VGS limited to ±20 V.
3 S passive Source terminal of the N-channel MOSFET, rated for VDS of 100 V with VGS limited to ±20 V.
4 G input Gate terminal of the N-channel MOSFET; the absolute maximum gate-source voltage is ±20 V.
5 D passive Drain terminal of the N-channel MOSFET, rated for 100 V VDS and 17 A continuous drain current at TC = 25 °C.
6 D passive Drain terminal of the N-channel MOSFET, rated for 100 V VDS and 17 A continuous drain current at TC = 25 °C.
7 D passive Drain terminal of the N-channel MOSFET, rated for 100 V VDS and 17 A continuous drain current at TC = 25 °C.
8 D passive Drain terminal of the N-channel MOSFET, rated for 100 V VDS and 17 A continuous drain current at TC = 25 °C.

Key specifications

Parameter Value
Manufacturer Vishay Intertech
Package SOIC-8
Category Transistors/Thyristors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-source breakdown voltage VDS 100 V VGS = 0 V, ID = 250 μA 2
Gate-source threshold voltage VGS(th) 1 2.5 V VDS = VGS, ID = 250 μA 2
Gate-source leakage IGSS 100 nA VDS = 0 V, VGS = ± 20 V 2
Zero gate voltage drain current IDSS 1 μA VDS = 100 V, VGS = 0 V 2
Zero gate voltage drain current IDSS 15 μA VDS = 100 V, VGS = 0 V, TJ = 70 °C 2
Drain-source on-state resistance RDS(on) 0.0077 0.0093 Ω VGS = 10 V, ID = 10 A 2
Drain-source on-state resistance RDS(on) 0.0084 0.0103 Ω VGS = 4.5 V, ID = 10 A 2
Total gate charge Qg 62 95 nC VDS = 50 V, VGS = 10 V, ID = 10 A 2
Total gate charge Qg 28 42 nC VDS = 50 V, VGS = 4.5 V, ID = 10 A 2
Gate resistance Rg 0.3 0.87 1.5 Ω f = 1 MHz 2
Turn-on delay time td(on) 13 26 ns VDD = 50 V, RL = 5 Ω, ID ≈ 10 A, VGEN = 10 V, Rg = 1 Ω 2
Rise time tr 5 10 ns VDD = 50 V, RL = 5 Ω, ID ≈ 10 A, VGEN = 10 V, Rg = 1 Ω 2
Turn-off delay time td(off) 35 70 ns VDD = 50 V, RL = 5 Ω, ID ≈ 10 A, VGEN = 10 V, Rg = 1 Ω 2
Fall time tf 5 10 ns VDD = 50 V, RL = 5 Ω, ID ≈ 10 A, VGEN = 10 V, Rg = 1 Ω 2
Turn-on delay time td(on) 28 56 ns VDD = 50 V, RL = 5 Ω, ID ≈ 10 A, VGEN = 4.5 V, Rg = 1 Ω 2
Rise time tr 22 44 ns VDD = 50 V, RL = 5 Ω, ID ≈ 10 A, VGEN = 4.5 V, Rg = 1 Ω 2
Turn-off delay time td(off) 36 72 ns VDD = 50 V, RL = 5 Ω, ID ≈ 10 A, VGEN = 4.5 V, Rg = 1 Ω 2
Fall time tf 7 14 ns VDD = 50 V, RL = 5 Ω, ID ≈ 10 A, VGEN = 4.5 V, Rg = 1 Ω 2
Continuous source-drain diode current IS 5.4 A TC = 25 °C 2
Pulse diode forward current ISM 130 A 2
Body diode voltage VSD 0.74 1.1 V IS = 5 A, VGS = 0 V 2
Body diode reverse recovery time trr 39 78 ns IF = 10 A, di/dt = 100 A/μs, TJ = 25 °C 2
Body diode reverse recovery charge Qrr 68 136 nC IF = 10 A, di/dt = 100 A/μs, TJ = 25 °C 2
Drain-source voltage VDS 100 V 1
Gate-source voltage VGS -20 20 V 1
Continuous drain current ID 17 A TC = 25 °C, TJ = 150 °C 1
Continuous drain current ID 13.6 A TC = 70 °C, TJ = 150 °C 1
Continuous drain current ID 12 A TA = 25 °C, notes b, c 1
Continuous drain current ID 9.6 A TA = 70 °C, notes b, c 1
Pulsed drain current IDM 130 A t = 100 μs 1
Continuous source-drain diode current IS 5.4 A TC = 25 °C 1
Continuous source-drain diode current IS 2.7 A TA = 25 °C, notes b, c 1
Single pulse avalanche current IAS 30 A L = 0.1 mH 1
Single pulse avalanche energy EAS 45 mJ 1
Maximum power dissipation PD 8.4 W TC = 25 °C 1
Maximum power dissipation PD 5.9 W TC = 70 °C 1
Maximum power dissipation PD 3.8 W TA = 25 °C, notes b, c 1
Maximum power dissipation PD 3 W TA = 70 °C, notes b, c 1
Operating junction and storage temperature range TJ, Tstg -55 150 °C 1
Soldering recommendations (peak temperature) 260 °C note c 1
Maximum junction-to-ambient RthJA 33 42 °C/W t ≤ 10 s, notes b 1
Maximum junction-to-case (drain) RthJC 16 21 °C/W Steady state 1
Maximum junction-to-ambient RthJA 85 °C/W Steady state, note d 1

CAD (KiCad official)

  • Symbol: SI4190BDY-T1-GE3
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: si4190bdy-t1-ge3-etched.step / si4190bdy-t1-ge3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); si4190bdy-t1-ge3.step / si4190bdy-t1-ge3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Vishay Intertech datasheet (7 pp, sha256 bf5ba9f6f511800f, retrieved 2026-10-29, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF