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SI4151DY-T1-GE3

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Vishay Intertech MOSFETs, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SI4151DY-T1-GE3

Vishay Intertech · MOSFETs · SO-8

SI4151DY-T1-GE3 from Vishay Intertech, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S passive Source of the P-channel MOSFET, tied with pins 2 and 3; continuous source-drain diode current is -5.1 A at TC = 25 °C.
2 S passive Source of the P-channel MOSFET, tied with pins 1 and 3; continuous source-drain diode current is -5.1 A at TC = 25 °C.
3 S passive Source of the P-channel MOSFET, tied with pins 1 and 2; continuous source-drain diode current is -5.1 A at TC = 25 °C.
4 G input Gate of the P-channel MOSFET; gate-source voltage limit is ±25 V with threshold of -1 V to -2.5 V.
5 D passive Drain of the P-channel MOSFET, tied with pins 6, 7 and 8; drain-source voltage is -30 V max and continuous drain current is -20.5 A at TC = 25 °C.
6 D passive Drain of the P-channel MOSFET, tied with pins 5, 7 and 8; drain-source voltage is -30 V max and continuous drain current is -20.5 A at TC = 25 °C.
7 D passive Drain of the P-channel MOSFET, tied with pins 5, 6 and 8; drain-source voltage is -30 V max and continuous drain current is -20.5 A at TC = 25 °C.
8 D passive Drain of the P-channel MOSFET, tied with pins 5, 6 and 7; drain-source voltage is -30 V max and continuous drain current is -20.5 A at TC = 25 °C.

Key specifications

Parameter Value
Manufacturer Vishay Intertech
Package SO-8
Category Triode/MOS Tube/Transistor
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-source breakdown voltage VDS -30 V VGS = 0 V, ID = -250 μA 2
Gate-source threshold voltage VGS(th) -1 -2.5 V VDS = VGS, ID = -250 μA 2
Gate-source leakage IGSS -100 100 nA VDS = 0 V, VGS = ± 25 V 2
Zero gate voltage drain current IDSS -1 μA VDS = -30 V, VGS = 0 V 2
Zero gate voltage drain current (70 °C) IDSS -15 μA VDS = -30 V, VGS = 0 V, TJ = 70 °C 2
Drain-source on-state resistance RDS(on) 0.00625 0.0075 Ω VGS = -10 V, ID = -10 A 2
Drain-source on-state resistance RDS(on) 0.0102 0.013 Ω VGS = -4.5 V, ID = -10 A 2
Total gate charge Qg 58 87 nC VDS = -15 V, VGS = -10 V, ID = -10 A 2
Total gate charge Qg 28 42 nC VDS = -15 V, VGS = -4.5 V, ID = -10 A 2
Gate resistance Rg 1.1 2.2 3.8 Ω f = 1 MHz 2
Turn-on delay time td(on) 26 54 ns VDD = -15 V, RL = 1.5 Ω, ID ≅ -10 A, VGEN = -4.5 V, Rg = 1 Ω 2
Rise time tr 67 135 ns VDD = -15 V, RL = 1.5 Ω, ID ≅ -10 A, VGEN = -4.5 V, Rg = 1 Ω 2
Turn-off delay time td(off) 30 60 ns VDD = -15 V, RL = 1.5 Ω, ID ≅ -10 A, VGEN = -4.5 V, Rg = 1 Ω 2
Fall time tf 20 40 ns VDD = -15 V, RL = 1.5 Ω, ID ≅ -10 A, VGEN = -4.5 V, Rg = 1 Ω 2
Turn-on delay time td(on) 12 24 ns VDD = -15 V, RL = 1.5 Ω, ID ≅ -10 A, VGEN = -10 V, Rg = 1 Ω 2
Rise time tr 7 14 ns VDD = -15 V, RL = 1.5 Ω, ID ≅ -10 A, VGEN = -10 V, Rg = 1 Ω 2
Turn-off delay time td(off) 40 80 ns VDD = -15 V, RL = 1.5 Ω, ID ≅ -10 A, VGEN = -10 V, Rg = 1 Ω 2
Fall time tf 8 16 ns VDD = -15 V, RL = 1.5 Ω, ID ≅ -10 A, VGEN = -10 V, Rg = 1 Ω 2
Continuous source-drain diode current IS -5.1 A TC = 25 °C 2
Pulse diode forward current ISM -150 A 2
Body diode voltage VSD -0.75 -1.1 V IS = -5 A, VGS = 0 V 2
Body diode reverse recovery time trr 18 36 ns IF = -10 A, di/dt = 100 A/μs, TJ = 25 °C 2
Body diode reverse recovery charge Qrr 8 16 nC IF = -10 A, di/dt = 100 A/μs, TJ = 25 °C 2
Drain-source voltage VDS -30 V TA = 25 °C 1
Gate-source voltage VGS -25 25 V TA = 25 °C 1
Continuous drain current ID -20.5 A TJ = 150 °C, TC = 25 °C 1
Continuous drain current ID -16.4 A TJ = 150 °C, TC = 70 °C 1
Continuous drain current ID -15.2 A TJ = 150 °C, TA = 25 °C, b, c 1
Continuous drain current ID -12.1 A TJ = 150 °C, TA = 70 °C, b, c 1
Pulsed drain current IDM -150 A t = 100 μs 1
Continuous source-drain diode current IS -5.1 A TC = 25 °C 1
Continuous source-drain diode current IS -2.8 A TA = 25 °C, b, c 1
Single pulse avalanche current IAS -20 A L = 0.1 mH 1
Single pulse avalanche energy EAS 20 mJ L = 0.1 mH 1
Maximum power dissipation PD 5.6 W TC = 25 °C 1
Maximum power dissipation PD 3.6 W TC = 70 °C 1
Maximum power dissipation PD 3.1 W TA = 25 °C, b, c 1
Maximum power dissipation PD 2 W TA = 70 °C, b, c 1
Operating junction and storage temperature range TJ, Tstg -55 150 °C 1
Soldering recommendations (peak temperature) 260 °C d, e 1
Maximum junction-to-ambient RthJA 34 40 °C/W t ≤ 10 s, b, d 1
Maximum junction-to-case (drain) RthJF 18 22 °C/W Steady state 1
VDS temperature coefficient ΔVDS/TJ -27 mV/°C ID = -250 μA 2
VGS(th) temperature coefficient ΔVGS(th)/TJ 4.4 mV/°C ID = -250 μA 2
Forward transconductance gfs 37 S VDS = -10 V, ID = -10 A 2
Input capacitance Ciss 3250 pF VDS = -15 V, VGS = 0 V, f = 1 MHz 2
Output capacitance Coss 410 pF VDS = -15 V, VGS = 0 V, f = 1 MHz 2
Reverse transfer capacitance Crss 375 pF VDS = -15 V, VGS = 0 V, f = 1 MHz 2
Gate-source charge Qgs 10.7 nC VDS = -15 V, VGS = -4.5 V, ID = -10 A 2
Gate-drain charge Qgd 9.9 nC VDS = -15 V, VGS = -4.5 V, ID = -10 A 2
Reverse recovery fall time ta 9 ns IF = -10 A, di/dt = 100 A/μs, TJ = 25 °C 2
Reverse recovery rise time tb 9 ns IF = -10 A, di/dt = 100 A/μs, TJ = 25 °C 2

CAD (KiCad official)

  • Symbol: SI4151DY-T1-GE3
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: si4151dy-t1-ge3-etched.step / si4151dy-t1-ge3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); si4151dy-t1-ge3.step / si4151dy-t1-ge3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Vishay Intertech datasheet (7 pp, sha256 b3aa0bc8b5eae67b, retrieved 2026-10-26, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF