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Contents

README

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SI4134DY-T1-E3

Vishay Intertech · MOSFETs · SO-8

SI4134DY-T1-E3 from Vishay Intertech, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S passive Source terminal of the N-channel MOSFET (30 V, D-S), one of three source pins tied together on the SO-8 top view.
2 S passive Source terminal of the N-channel MOSFET (30 V, D-S), one of three source pins tied together on the SO-8 top view.
3 S passive Source terminal of the N-channel MOSFET (30 V, D-S), one of three source pins tied together on the SO-8 top view.
4 G input Gate terminal of the N-channel MOSFET; the datasheet gives VGS limits of ±20 V absolute maximum and VGS(th) of 1.2 V to 2.5 V.
5 D passive Drain terminal of the N-channel MOSFET (VDS 30 V); one of four drain pins tied together on the SO-8 top view.
6 D passive Drain terminal of the N-channel MOSFET (VDS 30 V); one of four drain pins tied together on the SO-8 top view.
7 D passive Drain terminal of the N-channel MOSFET (VDS 30 V); one of four drain pins tied together on the SO-8 top view.
8 D passive Drain terminal of the N-channel MOSFET (VDS 30 V); one of four drain pins tied together on the SO-8 top view.

Key specifications

Parameter Value
Manufacturer Vishay Intertech
Package SO-8
Category Transistors/Thyristors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Breakdown Voltage VDS 30 V VGS = 0 V, ID = 250 µA 2
Gate-Source Threshold Voltage VGS(th) 1.2 1.8 2.5 V VDS = VGS, ID = 250 µA 2
Gate-Source Leakage IGSS -100 100 nA VDS = 0 V, VGS = ±20 V 2
Zero Gate Voltage Drain Current IDSS 1 µA VDS = 30 V, VGS = 0 V 2
Zero Gate Voltage Drain Current IDSS 10 µA VDS = 30 V, VGS = 0 V, TJ = 55 °C 2
On-State Drain Current ID(on) 20 A VDS ≥ 5 V, VGS = 10 V 2
Drain-Source On-State Resistance RDS(on) 0.0115 0.014 Ω VGS = 10 V, ID = 10 A 2
Drain-Source On-State Resistance RDS(on) 0.0145 0.0175 Ω VGS = 4.5 V, ID = 7 A 2
Total Gate Charge Qg 15.4 23 nC VDS = 15 V, VGS = 10 V, ID = 10 A 2
Total Gate Charge Qg 7.3 11 nC VDS = 15 V, VGS = 4.5 V, ID = 10 A 2
Gate Resistance Rg 0.2 0.8 1.6 Ω f = 1 MHz 2
Turn-On Delay Time td(on) 15 30 ns VDD = 15 V, RL = 1.5 Ω, ID ≅ 10 A, VGEN = 4.5 V, Rg = 1 Ω 2
Rise Time tr 12 24 ns VDD = 15 V, RL = 1.5 Ω, ID ≅ 10 A, VGEN = 4.5 V, Rg = 1 Ω 2
Turn-Off Delay Time td(off) 13 26 ns VDD = 15 V, RL = 1.5 Ω, ID ≅ 10 A, VGEN = 4.5 V, Rg = 1 Ω 2
Fall Time tf 10 20 ns VDD = 15 V, RL = 1.5 Ω, ID ≅ 10 A, VGEN = 4.5 V, Rg = 1 Ω 2
Turn-On Delay Time td(on) 9 18 ns VDD = 15 V, RL = 1.5 Ω, ID ≅ 10 A, VGEN = 10 V, Rg = 1 Ω 2
Rise Time tr 9 18 ns VDD = 15 V, RL = 1.5 Ω, ID ≅ 10 A, VGEN = 10 V, Rg = 1 Ω 2
Turn-Off Delay Time td(off) 14 28 ns VDD = 15 V, RL = 1.5 Ω, ID ≅ 10 A, VGEN = 10 V, Rg = 1 Ω 2
Fall Time tf 8 16 ns VDD = 15 V, RL = 1.5 Ω, ID ≅ 10 A, VGEN = 10 V, Rg = 1 Ω 2
Continuous Source-Drain Diode Current IS 4.2 A TC = 25 °C 2
Pulse Diode Forward Current ISM 50 A 2
Body Diode Voltage VSD 0.78 1.2 V IS = 3 A 2
Body Diode Reverse Recovery Time trr 17 34 ns IF = 10 A, dI/dt = 100 A/µs, TJ = 25 °C 2
Body Diode Reverse Recovery Charge Qrr 9.5 19 nC IF = 10 A, dI/dt = 100 A/µs, TJ = 25 °C 2
Drain-Source Voltage VDS 30 V 1
Gate-Source Voltage VGS -20 20 V 1
Continuous Drain Current ID 14 A TJ = 150 °C, TC = 25 °C 1
Continuous Drain Current ID 11.2 A TJ = 150 °C, TC = 70 °C 1
Continuous Drain Current ID 9.9 A TJ = 150 °C, TA = 25 °C (notes b, c) 1
Continuous Drain Current ID 7.9 A TJ = 150 °C, TA = 70 °C (notes b, c) 1
Pulsed Drain Current IDM 50 A t = 300 µs 1
Continuous Source-Drain Diode Current IS 4.1 A TC = 25 °C 1
Continuous Source-Drain Diode Current IS 2 A TA = 25 °C (notes b, c) 1
Single Pulse Avalanche Current IAS 15 A L = 0.1 mH 1
Avalanche Energy EAS 11.25 mJ 1
Maximum Power Dissipation PD 5 W TC = 25 °C 1
Maximum Power Dissipation PD 3.2 W TC = 70 °C 1
Maximum Power Dissipation PD 2.5 W TA = 25 °C (notes b, c) 1
Maximum Power Dissipation PD 1.6 W TA = 70 °C (notes b, c) 1
Operating Junction and Storage Temperature Range TJ, Tstg -55 150 °C 1
Maximum Junction-to-Ambient RthJA 38 50 °C/W t ≤ 10 s (notes b, d) 1
Maximum Junction-to-Ambient RthJA 85 °C/W Steady state, surface mounted on 1" x 1" FR4 board (note d) 1
Maximum Junction-to-Foot (Drain) RthJF 20 25 °C/W Steady state 1

CAD (KiCad official)

  • Symbol: SI4134DY-T1-E3
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: si4134dy-t1-e3-etched.step / si4134dy-t1-e3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); si4134dy-t1-e3.step / si4134dy-t1-e3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Vishay Intertech datasheet (9 pp, sha256 9c674afa2968cfbb, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF