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SI4058DY-T1-GE3
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Vishay Intertech MOSFETs, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SI4058DY-T1-GE3
Vishay Intertech · MOSFETs · SO-8
SI4058DY-T1-GE3 from Vishay Intertech, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source terminal of the single N-channel MOSFET; the datasheet gives the absolute maximum ratings VDS 100 V and VGS ±20 V for the device. |
| 2 | S | passive | Source terminal of the single N-channel MOSFET; the datasheet gives the absolute maximum ratings VDS 100 V and VGS ±20 V for the device. |
| 3 | S | passive | Source terminal of the single N-channel MOSFET; the datasheet gives the absolute maximum ratings VDS 100 V and VGS ±20 V for the device. |
| 4 | G | input | Gate terminal of the N-channel MOSFET; the datasheet gives a gate-source voltage limit of ±20 V and a gate-source threshold of 1.2 V to 2.8 V at ID = 250 µA. |
| 5 | D | passive | Drain terminal of the N-channel MOSFET, internally common with pins 6, 7 and 8; the drain-source breakdown voltage is 100 V minimum. |
| 6 | D | passive | Drain terminal of the N-channel MOSFET, internally common with pins 5, 7 and 8; the drain-source breakdown voltage is 100 V minimum. |
| 7 | D | passive | Drain terminal of the N-channel MOSFET, internally common with pins 5, 6 and 8; the drain-source breakdown voltage is 100 V minimum. |
| 8 | D | passive | Drain terminal of the N-channel MOSFET, internally common with pins 5, 6 and 7; the drain-source breakdown voltage is 100 V minimum. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Vishay Intertech |
| Package | SO-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDS | 100 | V | 1 | |||
| Gate-Source Voltage | VGS | -20 | 20 | V | 1 | ||
| Continuous Drain Current | ID | 10.3 | A | TJ = 150 °C, TC = 25 °C | 1 | ||
| Continuous Drain Current | ID | 8.3 | A | TJ = 150 °C, TC = 70 °C | 1 | ||
| Continuous Drain Current | ID | 7 | A | TA = 25 °C, notes b, c | 1 | ||
| Continuous Drain Current | ID | 5.5 | A | TA = 70 °C, notes b, c | 1 | ||
| Pulsed Drain Current | IDM | 50 | A | t = 300 μs | 1 | ||
| Continuous Source-Drain Diode Current | IS | 5 | A | TC = 25 °C | 1 | ||
| Single Pulse Avalanche Current | IAS | 15 | A | L = 0.1 mH | 1 | ||
| Avalanche Energy | EAS | 11.2 | mJ | 1 | |||
| Maximum Power Dissipation | PD | 5.6 | W | TC = 25 °C | 1 | ||
| Maximum Power Dissipation | PD | 3.6 | W | TC = 70 °C | 1 | ||
| Maximum Power Dissipation | PD | 2.6 | W | TA = 25 °C, notes b, c | 1 | ||
| Maximum Power Dissipation | PD | 1.6 | W | TA = 70 °C, notes b, c | 1 | ||
| Operating Junction and Storage Temperature Range | TJ, Tstg | -55 | 150 | °C | 1 | ||
| Maximum Junction-to-Ambient (t 10 s) | RthJA | 39 | 48 | °C/W | t 10 s, notes b, d | 1 | |
| Maximum Junction-to-Ambient (steady state) | RthJA | 90 | °C/W | steady state, note d | 1 | ||
| Maximum Junction-to-Foot (Drain), steady state | RthJF | 18 | 22 | °C/W | steady state | 1 | |
| Drain-Source Breakdown Voltage | VDS | 100 | V | VGS = 0 V, ID = 250 μA | 2 | ||
| Gate-Source Threshold Voltage | VGS(th) | 1.2 | 2.8 | V | VDS = VGS, ID = 250 μA | 2 | |
| Gate-Source Leakage | IGSS | -100 | 100 | nA | VDS = 0 V, VGS = ± 20 V | 2 | |
| Zero Gate Voltage Drain Current | IDSS | 1 | μA | VDS = 100 V, VGS = 0 V | 2 | ||
| Zero Gate Voltage Drain Current | IDSS | 10 | μA | VDS = 100 V, VGS = 0 V, TJ = 70 °C | 2 | ||
| On-State Drain Current | ID(on) | 20 | A | VDS 5 V, VGS = 10 V | 2 | ||
| Drain-Source On-State Resistance | RDS(on) | 0.0217 | 0.026 | Ω | VGS = 10 V, ID = 10 A | 2 | |
| Drain-Source On-State Resistance | RDS(on) | 0.0266 | 0.033 | Ω | VGS = 4.5 V, ID = 8 A | 2 | |
| Total Gate Charge | Qg | 12 | 18 | nC | VDS = 50 V, VGS = 10 V, ID = 10 A | 2 | |
| Total Gate Charge | Qg | 5.8 | 9 | nC | VDS = 50 V, VGS = 4.5 V, ID = 10 A | 2 | |
| Output Charge | Qoss | 22.5 | 35 | nC | VDS = 50 V, VGS = 0 V | 2 | |
| Gate Resistance | Rg | 0.8 | 2.2 | 4 | Ω | f = 1 MHz | 2 |
| Turn-On Delay Time | td(on) | 8 | 16 | ns | VDD = 50 V, RL = 5, ID 10 A, VGEN = 4.5 V, Rg = 1 | 2 | |
| Rise Time | tr | 17 | 34 | ns | VDD = 50 V, RL = 5, ID 10 A, VGEN = 4.5 V, Rg = 1 | 2 | |
| Turn-Off Delay Time | td(off) | 11 | 22 | ns | VDD = 50 V, RL = 5, ID 10 A, VGEN = 4.5 V, Rg = 1 | 2 | |
| Fall Time | tf | 8 | 16 | ns | VDD = 50 V, RL = 5, ID 10 A, VGEN = 4.5 V, Rg = 1 | 2 | |
| Turn-On Delay Time | td(on) | 7 | 14 | ns | VDD = 50 V, RL = 5, ID 10 A, VGEN = 10 V, Rg = 1 | 2 | |
| Rise Time | tr | 16 | 32 | ns | VDD = 50 V, RL = 5, ID 10 A, VGEN = 10 V, Rg = 1 | 2 | |
| Turn-Off Delay Time | td(off) | 12 | 24 | ns | VDD = 50 V, RL = 5, ID 10 A, VGEN = 10 V, Rg = 1 | 2 | |
| Fall Time | tf | 7 | 14 | ns | VDD = 50 V, RL = 5, ID 10 A, VGEN = 10 V, Rg = 1 | 2 | |
| Continuous Source-Drain Diode Current | IS | 5 | A | TC = 25 °C | 2 | ||
| Pulse Diode Forward Current | ISM | 50 | A | 2 | |||
| Body Diode Voltage | VSD | 0.81 | 1.1 | V | IS = 5 A | 2 | |
| Body Diode Reverse Recovery Time | trr | 56 | 112 | ns | IF = 10 A, di/dt = 100 A/μs, TJ = 25 °C | 2 | |
| Body Diode Reverse Recovery Charge | Qrr | 60 | 120 | nC | IF = 10 A, di/dt = 100 A/μs, TJ = 25 °C | 2 |
CAD (KiCad official)
- Symbol:
SI4058DY-T1-GE3 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files:
si4058dy-t1-ge3-etched.step/si4058dy-t1-ge3-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);si4058dy-t1-ge3.step/si4058dy-t1-ge3.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Vishay Intertech datasheet (9 pp, sha256
2ec677432c276557, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SI4058DY-T1-GE3
**Vishay Intertech** · MOSFETs · SO-8
SI4058DY-T1-GE3 from Vishay Intertech, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source terminal of the single N-channel MOSFET; the datasheet gives the absolute maximum ratings VDS 100 V and VGS ±20 V for the device. |
| 2 | S | passive | Source terminal of the single N-channel MOSFET; the datasheet gives the absolute maximum ratings VDS 100 V and VGS ±20 V for the device. |
| 3 | S | passive | Source terminal of the single N-channel MOSFET; the datasheet gives the absolute maximum ratings VDS 100 V and VGS ±20 V for the device. |
| 4 | G | input | Gate terminal of the N-channel MOSFET; the datasheet gives a gate-source voltage limit of ±20 V and a gate-source threshold of 1.2 V to 2.8 V at ID = 250 µA. |
| 5 | D | passive | Drain terminal of the N-channel MOSFET, internally common with pins 6, 7 and 8; the drain-source breakdown voltage is 100 V minimum. |
| 6 | D | passive | Drain terminal of the N-channel MOSFET, internally common with pins 5, 7 and 8; the drain-source breakdown voltage is 100 V minimum. |
| 7 | D | passive | Drain terminal of the N-channel MOSFET, internally common with pins 5, 6 and 8; the drain-source breakdown voltage is 100 V minimum. |
| 8 | D | passive | Drain terminal of the N-channel MOSFET, internally common with pins 5, 6 and 7; the drain-source breakdown voltage is 100 V minimum. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Vishay Intertech |
| Package | SO-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDS | | | 100 | V | | 1 |
| Gate-Source Voltage | VGS | -20 | | 20 | V | | 1 |
| Continuous Drain Current | ID | | | 10.3 | A | TJ = 150 °C, TC = 25 °C | 1 |
| Continuous Drain Current | ID | | | 8.3 | A | TJ = 150 °C, TC = 70 °C | 1 |
| Continuous Drain Current | ID | | | 7 | A | TA = 25 °C, notes b, c | 1 |
| Continuous Drain Current | ID | | | 5.5 | A | TA = 70 °C, notes b, c | 1 |
| Pulsed Drain Current | IDM | | | 50 | A | t = 300 μs | 1 |
| Continuous Source-Drain Diode Current | IS | | | 5 | A | TC = 25 °C | 1 |
| Single Pulse Avalanche Current | IAS | | | 15 | A | L = 0.1 mH | 1 |
| Avalanche Energy | EAS | | | 11.2 | mJ | | 1 |
| Maximum Power Dissipation | PD | | | 5.6 | W | TC = 25 °C | 1 |
| Maximum Power Dissipation | PD | | | 3.6 | W | TC = 70 °C | 1 |
| Maximum Power Dissipation | PD | | | 2.6 | W | TA = 25 °C, notes b, c | 1 |
| Maximum Power Dissipation | PD | | | 1.6 | W | TA = 70 °C, notes b, c | 1 |
| Operating Junction and Storage Temperature Range | TJ, Tstg | -55 | | 150 | °C | | 1 |
| Maximum Junction-to-Ambient (t 10 s) | RthJA | | 39 | 48 | °C/W | t 10 s, notes b, d | 1 |
| Maximum Junction-to-Ambient (steady state) | RthJA | | | 90 | °C/W | steady state, note d | 1 |
| Maximum Junction-to-Foot (Drain), steady state | RthJF | | 18 | 22 | °C/W | steady state | 1 |
| Drain-Source Breakdown Voltage | VDS | 100 | | | V | VGS = 0 V, ID = 250 μA | 2 |
| Gate-Source Threshold Voltage | VGS(th) | 1.2 | | 2.8 | V | VDS = VGS, ID = 250 μA | 2 |
| Gate-Source Leakage | IGSS | -100 | | 100 | nA | VDS = 0 V, VGS = ± 20 V | 2 |
| Zero Gate Voltage Drain Current | IDSS | | | 1 | μA | VDS = 100 V, VGS = 0 V | 2 |
| Zero Gate Voltage Drain Current | IDSS | | | 10 | μA | VDS = 100 V, VGS = 0 V, TJ = 70 °C | 2 |
| On-State Drain Current | ID(on) | 20 | | | A | VDS 5 V, VGS = 10 V | 2 |
| Drain-Source On-State Resistance | RDS(on) | | 0.0217 | 0.026 | Ω | VGS = 10 V, ID = 10 A | 2 |
| Drain-Source On-State Resistance | RDS(on) | | 0.0266 | 0.033 | Ω | VGS = 4.5 V, ID = 8 A | 2 |
| Total Gate Charge | Qg | | 12 | 18 | nC | VDS = 50 V, VGS = 10 V, ID = 10 A | 2 |
| Total Gate Charge | Qg | | 5.8 | 9 | nC | VDS = 50 V, VGS = 4.5 V, ID = 10 A | 2 |
| Output Charge | Qoss | | 22.5 | 35 | nC | VDS = 50 V, VGS = 0 V | 2 |
| Gate Resistance | Rg | 0.8 | 2.2 | 4 | Ω | f = 1 MHz | 2 |
| Turn-On Delay Time | td(on) | | 8 | 16 | ns | VDD = 50 V, RL = 5, ID 10 A, VGEN = 4.5 V, Rg = 1 | 2 |
| Rise Time | tr | | 17 | 34 | ns | VDD = 50 V, RL = 5, ID 10 A, VGEN = 4.5 V, Rg = 1 | 2 |
| Turn-Off Delay Time | td(off) | | 11 | 22 | ns | VDD = 50 V, RL = 5, ID 10 A, VGEN = 4.5 V, Rg = 1 | 2 |
| Fall Time | tf | | 8 | 16 | ns | VDD = 50 V, RL = 5, ID 10 A, VGEN = 4.5 V, Rg = 1 | 2 |
| Turn-On Delay Time | td(on) | | 7 | 14 | ns | VDD = 50 V, RL = 5, ID 10 A, VGEN = 10 V, Rg = 1 | 2 |
| Rise Time | tr | | 16 | 32 | ns | VDD = 50 V, RL = 5, ID 10 A, VGEN = 10 V, Rg = 1 | 2 |
| Turn-Off Delay Time | td(off) | | 12 | 24 | ns | VDD = 50 V, RL = 5, ID 10 A, VGEN = 10 V, Rg = 1 | 2 |
| Fall Time | tf | | 7 | 14 | ns | VDD = 50 V, RL = 5, ID 10 A, VGEN = 10 V, Rg = 1 | 2 |
| Continuous Source-Drain Diode Current | IS | | | 5 | A | TC = 25 °C | 2 |
| Pulse Diode Forward Current | ISM | | | 50 | A | | 2 |
| Body Diode Voltage | VSD | | 0.81 | 1.1 | V | IS = 5 A | 2 |
| Body Diode Reverse Recovery Time | trr | | 56 | 112 | ns | IF = 10 A, di/dt = 100 A/μs, TJ = 25 °C | 2 |
| Body Diode Reverse Recovery Charge | Qrr | | 60 | 120 | nC | IF = 10 A, di/dt = 100 A/μs, TJ = 25 °C | 2 |
## CAD (KiCad official)
- Symbol: `SI4058DY-T1-GE3`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files: `si4058dy-t1-ge3-etched.step` / `si4058dy-t1-ge3-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `si4058dy-t1-ge3.step` / `si4058dy-t1-ge3.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Vishay Intertech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588923649021915136) (9 pp, sha256 `2ec677432c276557`, retrieved 2026-10-19, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/si4058dy-t1-ge3-datasheet.pdf)