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SI4056DY-T1-GE3
Public Made by Adomby adom
Vishay Intertech MOSFETs, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSI4056DY-T1-GE3
Vishay Intertech · MOSFETs · SO-8
SI4056DY-T1-GE3 from Vishay Intertech, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source of the N-channel MOSFET, tied with pins 2 and 3 in the SO-8 single configuration. |
| 2 | S | passive | Source of the N-channel MOSFET, tied with pins 1 and 3 in the SO-8 single configuration. |
| 3 | S | passive | Source of the N-channel MOSFET, tied with pins 1 and 2 in the SO-8 single configuration. |
| 4 | G | input | Gate of the N-channel MOSFET; gate-source voltage limit is ±20 V. |
| 5 | D | passive | Drain of the N-channel MOSFET, tied with pins 6, 7 and 8; VDS rated 100 V. |
| 6 | D | passive | Drain of the N-channel MOSFET, tied with pins 5, 7 and 8; VDS rated 100 V. |
| 7 | D | passive | Drain of the N-channel MOSFET, tied with pins 5, 6 and 8; VDS rated 100 V. |
| 8 | D | passive | Drain of the N-channel MOSFET, tied with pins 5, 6 and 7; VDS rated 100 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Vishay Intertech |
| Package | SO-8 |
| Category | Transistors |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-source voltage | VDS | 100 | V | TA = 25 °C | 1 | ||
| Gate-source voltage | VGS | -20 | 20 | V | TA = 25 °C | 1 | |
| Continuous drain current | ID | 11.1 | A | TJ = 150 °C, TC = 25 °C | 1 | ||
| Continuous drain current | ID | 8.8 | A | TJ = 150 °C, TC = 70 °C | 1 | ||
| Continuous drain current | ID | 7.3 | A | TJ = 150 °C, TA = 25 °C (b, c) | 1 | ||
| Continuous drain current | ID | 5.8 | A | TJ = 150 °C, TA = 70 °C (b, c) | 1 | ||
| Pulsed drain current | IDM | 70 | A | t = 300 μs | 1 | ||
| Continuous source-drain diode current | IS | 5.1 | A | TC = 25 °C | 1 | ||
| Continuous source-drain diode current | IS | 2.2 | A | TA = 25 °C (b, c) | 1 | ||
| Single pulse avalanche current | IAS | 15 | A | L = 0.1 mH | 1 | ||
| Avalanche energy | EAS | 11.2 | mJ | L = 0.1 mH | 1 | ||
| Maximum power dissipation | PD | 5.7 | W | TC = 25 °C | 1 | ||
| Maximum power dissipation | PD | 3.6 | W | TC = 70 °C | 1 | ||
| Maximum power dissipation | PD | 2.5 | W | TA = 25 °C (b, c) | 1 | ||
| Maximum power dissipation | PD | 1.6 | W | TA = 70 °C (b, c) | 1 | ||
| Operating junction and storage temperature range | TJ, Tstg | -55 | 150 | °C | 1 | ||
| Maximum junction-to-ambient | RthJA | 35 | 50 | °C/W | t ≤ 10 s, surface mounted on 1" x 1" FR4 | 1 | |
| Maximum junction-to-foot (drain) | RthJF | 18 | 22 | °C/W | Steady state | 1 | |
| Drain-source breakdown voltage | VDS | 100 | V | VGS = 0 V, ID = 250 μA | 2 | ||
| Gate-source threshold voltage | VGS(th) | 1.5 | 2.8 | V | VDS = VGS, ID = 250 μA | 2 | |
| Gate-source leakage | IGSS | -100 | 100 | nA | VDS = 0 V, VGS = ± 20 V | 2 | |
| Zero gate voltage drain current | IDSS | 1 | μA | VDS = 100 V, VGS = 0 V | 2 | ||
| Zero gate voltage drain current | IDSS | 10 | μA | VDS = 100 V, VGS = 0 V, TJ = 55 °C | 2 | ||
| On-state drain current | ID(on) | 30 | A | VDS ≥ 5 V, VGS = 10 V | 2 | ||
| Drain-source on-state resistance | RDS(on) | 0.017 | 0.023 | Ω | VGS = 10 V, ID = 15 A | 2 | |
| Drain-source on-state resistance | RDS(on) | 0.018 | 0.024 | Ω | VGS = 7.5 V, ID = 12 A | 2 | |
| Drain-source on-state resistance | RDS(on) | 0.022 | 0.031 | Ω | VGS = 4.5 V, ID = 10 A | 2 | |
| Total gate charge | Qg | 19.6 | 29.5 | nC | VDS = 50 V, VGS = 10 V, ID = 10 A | 2 | |
| Total gate charge | Qg | 9.7 | 15 | nC | VDS = 50 V, VGS = 4.5 V, ID = 10 A | 2 | |
| Output charge | Qoss | 26.2 | 40 | nC | VDS = 50 V, VGS = 0 V | 2 | |
| Gate resistance | Rg | 0.2 | 0.85 | 1.7 | Ω | f = 1 MHz | 2 |
| Turn-on delay time | td(on) | 13 | 26 | ns | VDD = 50 V, RL = 5 Ω, ID ≅ 10 A, VGEN = 7.5 V, Rg = 1 Ω | 2 | |
| Rise time | tr | 14 | 28 | ns | VDD = 50 V, RL = 5 Ω, ID ≅ 10 A, VGEN = 7.5 V, Rg = 1 Ω | 2 | |
| Turn-off delay time | td(off) | 19 | 38 | ns | VDD = 50 V, RL = 5 Ω, ID ≅ 10 A, VGEN = 7.5 V, Rg = 1 Ω | 2 | |
| Fall time | tf | 10 | 20 | ns | VDD = 50 V, RL = 5 Ω, ID ≅ 10 A, VGEN = 7.5 V, Rg = 1 Ω | 2 | |
| Turn-on delay time | td(on) | 11 | 22 | ns | VDD = 50 V, RL = 5 Ω, ID ≅ 10 A, VGEN = 10 V, Rg = 1 Ω | 2 | |
| Rise time | tr | 10 | 20 | ns | VDD = 50 V, RL = 5 Ω, ID ≅ 10 A, VGEN = 10 V, Rg = 1 Ω | 2 | |
| Turn-off delay time | td(off) | 20 | 40 | ns | VDD = 50 V, RL = 5 Ω, ID ≅ 10 A, VGEN = 10 V, Rg = 1 Ω | 2 | |
| Fall time | tf | 9 | 18 | ns | VDD = 50 V, RL = 5 Ω, ID ≅ 10 A, VGEN = 10 V, Rg = 1 Ω | 2 | |
| Continuous source-drain diode current | IS | 5.1 | A | TC = 25 °C | 2 | ||
| Pulse diode forward current | ISM | 70 | A | 2 | |||
| Body diode voltage | VSD | 0.77 | 1.1 | V | IS = 4 A | 2 | |
| Body diode reverse recovery time | trr | 34 | 65 | ns | IF = 5 A, di/dt = 100 A/μs, TJ = 25 °C | 2 | |
| Body diode reverse recovery charge | Qrr | 34 | 65 | nC | IF = 5 A, di/dt = 100 A/μs, TJ = 25 °C | 2 | |
| VDS temperature coefficient | ΔVDS/TJ | 67 | mV/°C | ID = 250 μA | 2 | ||
| VGS(th) temperature coefficient | ΔVGS(th)/TJ | -5 | mV/°C | ID = 250 μA | 2 | ||
| Forward transconductance | gfs | 26 | S | VDS = 15 V, ID = 15 A | 2 | ||
| Input capacitance | Ciss | 900 | pF | VDS = 50 V, VGS = 0 V, f = 1 MHz | 2 | ||
| Output capacitance | Coss | 340 | pF | VDS = 50 V, VGS = 0 V, f = 1 MHz | 2 | ||
| Reverse transfer capacitance | Crss | 31 | pF | VDS = 50 V, VGS = 0 V, f = 1 MHz | 2 | ||
| Gate-source charge | Qgs | 2.8 | nC | VDS = 50 V, VGS = 10 V, ID = 10 A | 2 | ||
| Gate-drain charge | Qgd | 4.3 | nC | VDS = 50 V, VGS = 10 V, ID = 10 A | 2 |
CAD (KiCad official)
- Symbol:
SI4056DY-T1-GE3 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files:
si4056dy-t1-ge3-etched.step/si4056dy-t1-ge3-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);si4056dy-t1-ge3.step/si4056dy-t1-ge3.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Vishay Intertech datasheet (9 pp, sha256
43331bb35a03d2e0, retrieved 2026-10-22, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).